Real-Time Clock Counter Operations; Stopwatch Control; Stopwatch Count-Up Pattern - Epson S1C17W03 Technical Manual

Cmos 16-bit single chip microcontroller
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9 REAL-TIME CLOCK (RTCA)

9.4.2 Real-Time Clock Counter Operations

The real-time clock counter consists of second, minute, hour, AM/PM, day, month, year, and day of the week coun-
ters and it performs counting up using the RTC1S signal. It has the following functions as well.
Recognizing leap years
The leap year recognizing algorithm used in RTCA is effective only for Christian Era years. Years within 0 to
99 that can be divided by four without a remainder are recognized as leap years. If the year counter = 0x00,
RTCA assumes it as a common year. If a leap year is recognized, the count range of the day counter changes
when the month counter is set to February.
Corrective operation when a value out of the effective range is set
When a value out of the effective range is set to the year, day of the week, or hour (in 24H mode) counter, the
counter will be cleared to 0 at the next count-up timing. When a such value is set to the month, day, or hour (in
12H mode) counter, the counter will be set to 1 at the next count-up timing.
Note: Do not set the RTCMON.RTCMOL[3:0] bits to 0x0 if the RTCMON.RTCMOH bit = 0.
30-second correction
This function is provided to set the time-of-day clock by the time signal. Writing 1 to the RTCCTL.RTCADJ
bit clears the second counter and adds 1 to the minute counter if the second counter represents 30 to 59 seconds,
or clears the second counter with the minute counter left unchanged if the second counter represents 0 to 29
seconds.
+1 second correction
If a second count-up timing occurred while the RTCCTL.RTCHLD bit = 1 (count hold state), the real-time
clock counter counts up by +1 second (performs +1 second correction) after the counting has resumed by writ-
ing 0 to the RTCCTL.RTCHLD bit.
Note: If two or more second count-up timings occurred while the RTCCTL.RTCHLD bit = 1, the coun-
ter is always corrected for +1 second only.

9.4.3 Stopwatch Control

Follow the sequences shown below to start counting of the stopwatch and to read the counter.
Count start
1. Write 1 to the RTCSWCTL.SWRST bit to reset the stopwatch counter.
2. Write 1 to the stopwatch interrupt flags in the RTCINTF register to clear them.
3. Write 1 to the interrupt enable bits in the RTCINTE register to enable stopwatch interrupts.
4. Write 1 to the RTCSWCTL.SWRUN bit to start stopwatch count up operation.
Counter read
1. Read the count value from the RTCSWCTL.BCD10[3:0] and BCD100[3:0] bits.
2. Read again.
i. If the two read values are the same, assume that the count values are read correctly.
ii. If different values are read, perform reading once more and compare the read value with the previous one.

9.4.4 Stopwatch Count-up Pattern

The stopwatch consists of 1/100-second and 1/10-second counters and these counters perform counting up in incre-
ments of approximate 1/100 and 1/10 seconds with the count-up patterns shown in Figure 9.4.4.1.
9-4
Seiko Epson Corporation
S1C17W03/W04 TECHNICAL MANUAL
(Rev. 1.2)

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