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event counter
Remark POWER6: Bit 7 of asynchronous serial interface operation mode register 6 (ASIM6)
(2) Generation of serial clock
A serial clock to be generated can be specified by using clock selection register 6 (CKSR6) and baud rate
generator control register 6 (BRGC6).
The clock to be input to the 8-bit counter can be set by bits 3 to 0 (TPS63 to TPS60) of CKSR6 and the division
value (f
XCLK6
TPS63
0
0
0
0
0
0
0
0
1
1
1
1
248
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CHAPTER 10 SERIAL INTERFACE UART6
Figure 10-17. Configuration of Baud Rate Generator
POWER6
f
PRS
f
/2
PRS
2
f
/2
PRS
3
f
/2
PRS
4
f
/2
PRS
5
f
/2
PRS
Selector
6
f
/2
PRS
7
f
/2
PRS
8
f
/2
PRS
9
f
/2
PRS
10
f
/2
PRS
8-bit timer/
50 output
CKSR6: TPS63 to TPS60
TXE6:
Bit 6 of ASIM6
RXE6:
Bit 5 of ASIM6
CKSR6:
Clock selection register 6
BRGC6:
Baud rate generator control register 6
/4 to f
/255) of the 8-bit counter can be set by bits 7 to 0 (MDL67 to MDL60) of BRGC6.
XCLK6
Table 10-4. Set Value of TPS63 to TPS60
TPS62
TPS61
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
0
1
Other than above
Preliminary User's Manual U19014EJ1V0UD
Baud rate generator
POWER6, TXE6 (or RXE6)
8-bit counter
f
XCLK6
Match detector
BRGC6: MDL67 to MDL60
TPS60
Base clock (f
0
f
PRS
1
f
/2
PRS
2
0
f
/2
PRS
3
1
f
/2
PRS
4
0
f
/2
PRS
5
1
f
/2
PRS
6
0
f
/2
PRS
7
1
f
/2
PRS
8
0
f
/2
PRS
9
1
f
/2
PRS
10
0
f
/2
PRS
1
TM50 output
Setting prohibited
1/2
Baud rate
) selection
XCLK6
f
= 12 MHz
f
= 16 MHz
PRS
PRS
12 MHz
16 MHz
6 MHz
8 MHz
3 MHz
4 MHz
1.5 MHz
2 MHz
750 kHz
1 MHz
375 kHz
500 kHz
187.5 kHz
250 kHz
93.75 kHz
125 kHz
46.875 kHz
62.5 kHz
23.438 kHz
31.25 kHz
11.719 kHz
15.625 kHz
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