(5) Main clock mode register (MCM)
This register selects the main system clock supplied to CPU clock and clock supplied to peripheral hardware
clock.
MCM can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Address: FFA1H
Symbol
MCM
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CHAPTER 5 CLOCK GENERATOR
Figure 5-6. Format of Main Clock Mode Register (MCM)
Note
After reset: 00H
R/W
7
6
0
0
XSEL
MCM0
Selection of clock supplied to main system clock and peripheral hardware
0
0
Internal high-speed oscillation clock
(f
)
RH
0
1
1
0
Setting prohibited
1
1
High-speed system clock (f
MCS
0
Operates with internal high-speed oscillation clock
1
Operates with high-speed system clock
Note Bit 1 is read-only.
Cautions 1. XSEL can be changed only once after a reset release.
2. Be sure to set XSEL=1, MCM0=1 if using the USB function.
3. A clock other than f
regardless of the setting of XSEL and MCM0.
• Watchdog timer (operates with internal low-speed oscillation clock)
• When "f
", "f
RL
(operates with internal low-speed oscillation clock)
• Peripheral hardware selects the external clock as the clock source
(Except when the external count clock of TM00 is selected (TI000 pin valid
edge))
Preliminary User's Manual U19014EJ1V0UD
5
4
3
0
0
0
Main system clock (f
)
XP
)
XH
Main system clock status
is supplied to the following peripheral functions
PRS
7
9
/2
", or "f
/2
" is selected as the count clock for 8-bit timer H1
RL
RL
<2>
<1>
<0>
XSEL
MCS
MCM0
Peripheral hardware clock (f
PRS
Internal high-speed oscillation clock
(f
)
RH
High-speed system clock (f
)
XH
)
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