NEC mPD78F0730 Preliminary User's Manual page 145

Figure 6-30. Example of Register Settings in Clear & Start Mode Entered by TI000 Pin Valid Edge Input (2/2)
(d) Prescaler mode register 00 (PRM00)
ES101
0/1
(e) 16-bit timer counter 00 (TM00)
(f) 16-bit capture/compare register 000 (CR000)
(g) 16-bit capture/compare register 010 (CR010)
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CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
ES100 ES001 ES000
0/1 0/1 0/1
By reading TM00, the count value can be read.
When this register is used as a compare register and when its value matches the count value of TM00, an
interrupt signal (INTTM000) is generated. The count value of TM00 is not cleared.
To use this register as a capture register, select either the TI000 or TI010 pin
When the valid edge of the capture trigger is detected, the count value of TM00 is stored in CR000.
Note The timer output (TO00) cannot be used when detection of the valid edge of the TI010 pin is used.
When this register is used as a compare register and when its value matches the count value of TM00, an
interrupt signal (INTTM010) is generated. The count value of TM00 is not cleared.
When this register is used as a capture register, the TI000 pin input is used as a capture trigger. When the
valid edge of the capture trigger is detected, the count value of TM00 is stored in CR010.
3 2 PRM001 PRM000
0 0 0/1
Preliminary User's Manual U19014EJ1V0UD
0/1
Count clock selection
(setting TI000 valid edge is prohibited)
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
(setting prohibited when CRC001 = 1)
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
Note
input as a capture trigger.
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