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(4) Permissible baud rate range during reception
The permissible error from the baud rate at the transmission destination during reception is shown below.
Caution Make sure that the baud rate error during reception is within the permissible error range, by
Minimum permissible
Maximum permissible
As shown in Figure 10-18, the latch timing of the receive data is determined by the counter set by baud rate
generator control register 6 (BRGC6) after the start bit has been detected. If the last data (stop bit) meets this
latch timing, the data can be correctly received.
Assuming that 11-bit data is received, the theoretical values can be calculated as follows.
FL = (Brate)
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CHAPTER 10 SERIAL INTERFACE UART6
using the calculation expression shown below.
Figure 10-18. Permissible Baud Rate Range During Reception
Latch timing
Data frame length
Start bit
of UART6
Start bit
data frame length
Start bit
data frame length
−
1
Brate: Baud rate of UART6
k:
Set value of BRGC6
FL:
1-bit data length
Margin of latch timing: 2 clocks
Bit 0
Bit 1
FL
1 data frame (11 × FL)
Bit 0
Bit 1
FLmin
Bit 0
Bit 1
Preliminary User's Manual U19014EJ1V0UD
Bit 7
Parity bit
Stop bit
Bit 7
Parity bit
Stop bit
Bit 7
Parity bit
FLmax
Stop bit
251
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