NEC mPD78F0730 Preliminary User's Manual page 426

Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Port registers (P0, P1, P3, P6, P12) (output latches)
Port mode registers (PM0, PM1, PM3, PM6, PM12)
Pull-up resistor option registers (PU0, PU1, PU3, PU12)
Internal expansion RAM size switching register (IXS)
Internal memory size switching register (IMS)
Clock operation mode select register (OSCCTL)
Processor clock control register (PCC)
Internal oscillation mode register (RCM)
Main OSC control register (MOC)
Main clock mode register (MCM)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
PLL control register (PLLC)
USB clock control register (UCKC)
16-bit timer/event
counter 00
8-bit timer/event
counters 50, 51
Notes 1. During reset signal generation or oscillation stabilization time wait, only the PC contents among the
hardware statuses become undefined. All other hardware statuses remain unchanged after reset.
2. When a reset is executed in the standby mode, the pre-reset status is held even after reset.
3. The initial values of the internal memory size switching register (IMS) and internal expansion RAM size
switching register (IXS) after a reset release are fixed (IMS = CFH, IXS = 0CH), regardless of the internal
memory capacity. Therefore, after a reset is released, be sure to set the following values for each
product.
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CHAPTER 15 RESET FUNCTION
Table 15-2. Hardware Statuses After Reset Acknowledgment (1/3)
Hardware
Data memory
General-purpose registers
Timer counter 00 (TM00)
Capture/compare registers 000, 010 (CR000, CR010)
Mode control register 00 (TMC00)
Prescaler mode register 00 (PRM00)
Capture/compare control register 00 (CRC00)
Timer output control register 00 (TOC00)
Timer counters 50, 51 (TM50, TM51)
Compare registers 50, 51 (CR50, CR51)
Timer clock selection registers 50, 51 (TCL50, TCL51)
Mode control registers 50, 51 (TMC50, TMC51)
Flash Memory Version
µ
( PD78F0730)
µ
PD78F0730 C4H
Preliminary User's Manual U19014EJ1V0UD
IMS IXS
08H
After Reset
Note 1
Acknowledgment
The contents of the
reset vector table
(0000H, 0001H) are
set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H
FFH
00H
Note 3
0CH
Note 3
CFH
00H
01H
80H
80H
00H
00H
05H
00H
00H
0000H
0000H
00H
00H
00H
00H
00H
00H
00H
00H