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f
PRS
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/2
PRS
2
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/2
PRS
3
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/2
PRS
4
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/2
PRS
5
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/2
PRS
6
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PRS
7
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8
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10
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PRS
8-bit timer/
event counter
50 output
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Figure 10-1. Block Diagram of Serial Interface UART6
Asynchronous serial
Asynchronous serial
interface operation mode
interface reception error
register 6 (ASIM6)
status register 6 (ASIS6)
Asynchronous serial
Baud rate generator
Clock selection
interface transmission
control register 6
register 6 (CKSR6)
status register 6 (ASIF6)
(BRGC6)
8
8
Registers
INTSR6
Reception control
INTSRE6
Baud rate
generator
Reception unit
Internal bus
Baud rate
generator
INTST6
Transmission control
Transmission unit
R
D6/
Filter
X
P14
Receive shift register 6
(RXS6)
Receive buffer register 6
(RXB6)
Transmit buffer register 6
(TXB6)
Transmit shift register 6
(TXS6)
Output latch
(P13)
T
D6/
X
P13
PM13
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