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(a) 16-bit timer mode control register 00 (TMC00)
0
(b) Capture/compare control register 00 (CRC00)
0
(c) 16-bit timer output control register 00 (TOC00)
OSPT00
0
(d) Prescaler mode register 00 (PRM00)
ES101
0
(e) 16-bit timer counter 00 (TM00)
By reading TM00, the count value can be read.
(f) 16-bit capture/compare register 000 (CR000)
If M is set to CR000, the interrupt signal (INTTM000) is generated when the number of external events
reaches (M + 1).
Setting CR000 to 0000H is prohibited.
(g) 16-bit capture/compare register 010 (CR010)
Usually, CR010 is not used in the external event counter mode. However, a compare match interrupt
(INTTM010) is generated when the set value of CR010 matches the value of TM00.
Therefore, mask the interrupt request by using the interrupt mask flag (TMMK010).
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CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Figure 6-20. Example of Register Settings in External Event Counter Mode
TMC003 TMC002 TMC001
0
0
0
0
0
0
OSPE00
TOC004
LVS00
0
0
0
ES100
ES001
ES000
0
0/1
0/1
Preliminary User's Manual U19014EJ1V0UD
OVF00
1
1
0
0
CRC002 CRC001 CRC000
0
0
0
0
LVR00
TOC001
TOE00
0
0
0
3
2
PRM001 PRM000
0
0
1
Clears and starts on match
between TM00 and CR000.
CR000 used as
compare register
0
1
Selects count clock
(specifies valid edge of TI000).
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
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