Emerson ControlWave Instruction Manual page 119

Power-On-Self-
Test (POST)
Codes
Revised Aug-2015
ControlWave I/O Expansion Rack Instruction Manual
When you first power up the ControlWave I/O rack, or if you reset it
using the reset switch, the BIOS runs a power-on-self-test (POST) to
test the hardware. Normally, the POST codes pass by too quickly for
you to see them, and the system enters normal run time, or if the CPU is
set for force recovery mode, you see the code "86." If there is a fault
during the POST process, see Table 5-3 for the 2-digit failure code.
Table 5-3. Port 80 POST Status Codes
HEX Code Definition
00 POST beginning.
01 CPU register test about to start.
02 NMIs are disabled; delay starts.
03 power-on delay finished.
04 kbd BAT done; reading kbd SYS bit.
05 disabling shadowing & cache.
06 calcing ROM cksum, wait kbd ctrllr.
07 cksum okay, kbd ctrllr free.
08 verifying BAT cmd to kbd ctrllr.
09 N/A
0A N/A
0B issuing pin 23, 24 blocking & unblocking.
0C issuing kbd ctrllr NOP cmd next.
0D testing CMOS RAM shutdown register.
0E checking CMOS cksum, updating DIAG byte.
0F initializing CMOS (if req'd every boot).
10 Init. CMOS status reg. for date/time.
11 disabling DMA, interrupt ctrllrs.
12 disabling Port B, disabling video display.
13 Init. board, start auto-mem detect.
14 starting timer tests.
15 testing 8254 T2, for spkr, part B.
16 testing 8254 T1, for refresh.
17 testing 8254 To, for 18.2 Hz.
18 starting memory refresh.
19 testing memory refresh.
1A testing 15usec refresh ON/OFF time.
1B testing base 64KB memory.
1C testing data lines.
20 testing address lines.
21 testing parity (toggling).
22 base 64KB mem read/write test.
23 system init before vector table init.
24 init vector table.
25 reading 8042 for turbo switch setting.
26 initiating turbo data.
27 any init after vector table init is next.
28 N/A
29 N/A
2A toggle parity before optional video ROM.
2B N/A
Service & Troubleshooting 5-23