Jtag Interface; Power Input - Alinx AX7103 FPGA User Manual

Pin Assignment of Reset Button
Net Name
RESET_N

8. JTAG Interface

。In the AC7100 core board, it reserves a JTAG interface (J1), it is used to
download or debug FPGA program without expansion board. Figure 2-8-1 is circuit
part of the JTAG port, only four JTAG signals (TMS, TDI, TDO, TCK) are connected
to J1 for JTAG access
In AC7100 core board, the JTAG connector (J1) is not mounted, If user want to
use it, please install the JTAG connector with single 6-pins 2.54mm pitch connector.
Figure 2-8-2 shows the JTAG connector position on PCB board

9. Power Input

In AC7100 core board, we reserved a mini USB port (J2) which can power on
core board and work separately without expansion board. Using a USB cable connect
to computer, the +5.0V power supply is coming from USB port to power on AC7100
board. Please do not connect other power supply which voltage is higher than +5.0V,
it maybe damage the core board. The schematic diagram of the mini USB connection
is shown in Figure 2-9-1
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FPGA PIN Name
IO_L17N_T2_34
Figure 2-8-1 JTAG interface schematic
Figure 2-8-2 JTAG Interface on board
FPGA P/N
T6
AX7103 User Manual
Comment
Reset Button
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