Alinx AX7103 FPGA User Manual page 25

PIN77 FPGA_TCK
PIN79 FPGA_TDO
Figure 2-10-3 is the CON3 connector on core board, and the pin1 of connector is
marked on the board.
Connector CON4
The 80-Pin connector CON4 is used to extend the IOs of FPGA bank16, high
speed data of GTP transceivers and clock signals. The voltage level of these IOs is
+3.3V standard by default, but it can be changed to other voltage level if we change
the VCCO power supply of Bank16 by replacing the LDO chipset. High speed data
lines of GTP and clock signals on core board, are equals in length and maintain in a
certain intervals, could prevent signal interference
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V12 3.3V
U13 3.3V
Figure 2-10-3 CON3 Connector on board
PIN78 FPGA_TDI
PIN80 FPGA_TMS
AX7103 User Manual
R13 3.3V
T13 3.3V
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