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17 12-BIT A/D CONVERTER (ADC12A)
17.5 Interrupts
The ADC12A has a function to generate the interrupts shown in Table 17.5.1.
Interrupt
Analog input signal m A/D
conversion completion
Analog input signal m A/D
conversion result overwrite
error
Note that the A/D conversion continues even if an A/D conversion result overwrite error has occurred. A/D conver-
sion result overwrite errors are decided regardless of whether the ADC12_nADmD register has been read or not.
The ADC12A provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is sent to the
interrupt controller only when the interrupt flag, of which interrupt has been enabled by the interrupt enable bit, is
set. For more information on interrupt control, refer to the "Interrupt Controller" chapter.
17.6 Control Registers
ADC12A Ch.n Control Register
Register name
Bit
ADC12_nCTL
15
14–12 ADSTAT[2:0]
11
10
9–8 –
7–2 –
1
0
Bit 15
Reserved
Bits 14–12 ADSTAT[2:0]
These bits indicate the analog input pin number m being A/D converted.
Table 17.6.1 Relationship Between Control Bit Value and Analog Input Pin
ADC12_nTRG.ENDAIN[2:0] bits
These bits indicate the last converted analog input pin number after A/D conversion is forcefully
terminated by writing 0 to the ADC12_nCTL.ADST bit or automatically terminated in one-time
conversion mode (ADC12_nTRG.CNVMD = 0). If A/D conversion is stopped after the maximum
analog input pin number (different in each model) has been completed, these bits indicate ADINn0.
Bit 11
Reserved
17-6
Table 17.5.1 ADC12A Interrupt Function
Interrupt flag
ADC12_nINTF.ADmCIF
ADC12_nINTF.ADmOVIF
Bit name
Initial
–
0x0
–
BSYSTAT
0x0
0x00
ADST
MODEN
ADC12_nCTL.ADSTAT[2:0] bits
ADC12_nTRG.STAAIN[2:0] bits
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
Seiko Epson Corporation
Set condition
When an analog input signal m A/D conver-
sion result is loaded to the ADC12_nADmD
register
When a new A/D conversion result is loaded
to the ADC12_nADmD register while the
ADC12_nINTF.ADmCIF bit = 1
Reset
R/W
0
–
R
–
H0
R
0
–
R
0
H0
R
–
R
–
R
0
H0
R/W
0
H0
R/W
Analog input pin
ADINn7
ADINn6
ADINn5
ADINn4
ADINn3
ADINn2
ADINn1
ADINn0
Clear
condition
Writing 1
Writing 1
Remarks
S1C17M12/M13 TECHNICAL MANUAL
(Rev. 1.2)
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