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16.3.3 Clock Supply in DEBUG Mode
The CLK_LEDC supply during DEBUG mode should be controlled using the LEDCCLK.DBRUN bit.
The CLK_LEDC supply to LEDC is suspended when the CPU enters DEBUG mode if the LEDCCLK.DBRUN
bit = 0. After the CPU returns to normal mode, the CLK_LEDC supply resumes. Although LEDC stops operating
when the CLK_LEDC supply is suspended, the registers retain the status before DEBUG mode was entered. If the
LEDCCLK.DBRUN bit = 1, the CLK_LEDC supply is not suspended and LEDC will keep operating in DEBUG
mode.
16.3.4 LED Lighting Cycle
The LEDC asserts a signal for the period set using the LEDCLPSET.LICLKDIV[7:0] bits to light the LED module
of the corresponding digit. This operation is performed for the number of display digits set using the LEDCCTL.
NDIGITS[2:0] bits by switching the COM signals sequentially (refer to "Drive Waveform"). The dynamic lighting
is archived by repeating this operation.
Use the following equations to calculate the lighting period (COM signal active period) and lighting cycle of each
LED module (each digit).
(LICLKDIV + 1) × 8
LP = — — — — — — — — — — — —
f
CLK_LEDC
LC = LP × (NDIGITS + 1)
Where
LP:
Lighting period of each COM (digit) [s]
LC:
Lighting cycle of each COM (digit) [s]
f
: LEDC operating clock frequency [Hz]
CLK_LEDC
LICLKDIV: LEDCLPSET.LICLKDIV[7:0] setting value (0 to 255)
NDIGITS: LEDCCTL.NDIGITS[2:0] setting value (0 to 7*) * The maximum value depends on the model.
Example)
LEDCCLK.CLKSRC[1:0] bits = 0x2
LEDCCLK.CLKDIV[2:0] bits = 0x1
→ 1/f
CLK_LEDC
LEDCLPSET.LICLKDIV[7:0] bits = 0x22 (34 = Dividing into 1/35)
→ LP = 560 [µs]
LEDCCTL.NDIGITS[2:0] bits = 0x4
→ LC = 2,800 [µs]
16.4 Operations
16.4.1 Initialization
The LEDC should be initialized with the procedure shown below.
1. Assign the LEDC output function to the ports. (Refer to the "I/O Ports" chapter.)
2. Configure the LEDCCLK.CLKSRC[1:0] and LEDCCLK.CLKDIV[2:0] bits. (Configure operating clock)
3. Configure the following LEDCCTL register bits:
- Write 1 to the LEDCCTL.MODEN bit.
- LEDCCTL.CMOFFMOD bit
- LEDCCTL.SGOFFMOD bit
- LEDCCTL.COMMOD bit
- LEDCCTL.BRITCNT[1:0] bits
- LEDCCTL.NDIGITS[2:0] bits
4. Set the LEDCLPSET.LICLKDIV[7:0] bits.
5. Write display data to the LEDCDAT** registers.
S1C17M12/M13 TECHNICAL MANUAL
(Rev. 1.2)
(OSC3, 16 MHz = 62.5 ns)
(Dividing into 1/32)
= 2 [µs]
(5-digit display)
Seiko Epson Corporation
16 SEVEN-SEGMENT LED CONTROLLER (LEDC)
(Eq. 16.1)
(Eq. 16.2)
(Enable LEDC operating clock)
(Set driver state at COM off time)
(Set driver state at SEG off time)
(Select common mode)
(Adjust brightness)
(Select number of display digits)
(Set LED lighting period)
16-3
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