Smbus Protocols For Ram And Eeprom; Adm1060 Write Operations - Analog Devices ADM1060 Manual

ADM1060

SMBUS PROTOCOLS FOR RAM AND EEPROM

The ADM1060 contains volatile registers (RAM) and
non-volatile EEPROM. User RAM occupies address loca-
tions from 00h to DFh, whilst EEPROM occupies ad-
dresses from F800h to F9FFh.
Data can be written to and read from both RAM and
EEPROM as single data bytes.
Data can only be written to unprogrammed EEPROM
locations. To write new data to a programmed location it
is first necessary to erase it. EEPROM erasure cannot be
done at the byte level, the EEPROM is arranged as 16
pages of 32 bytes, and an entire page must be erased.
Page erasure is enabled by setting bit 3 in register
UPDCFG (address 90h) to 1. If this is not set then page
erasure cannot occur, even if the command byte (FEh) is
programmed across the SMBus.

ADM1060 WRITE OPERATIONS

The SMBus specification defines several protocols for
different types of read and write operations. The ones used
in the ADM1060 are discussed below. The following ab-
breviations are used in the diagrams:
S - START
P - S T O P
R - READ
W - WRITE
A - ACKNOWLEDGE
A
- NO ACKNOWLEDGE
The ADM1060 uses the following SMBus write protocols:
Send Byte
In this operation the master device sends a single com-
mand byte to a slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by
the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master asserts a STOP condition on SDA and the
transaction ends.
In the ADM1060, the send byte protocol is used for two
purposes.
1. To write a register address to RAM for a subsequent
single byte read from the same address or block read or
write starting at that address. This is illustrated in Figure
9a.
1 2
SLAVE
S
ADDRESS
Figure 9a. Setting A RAM Address For Subsequent Read
PRELIMINARY TECHNICAL DATA
3 4 5 6
RAM
W A ADDRESS A P
(00h TO DFh)
PROGRAMMING ADM1060
3. Erase a page of EEPROM memory. EEPROM
memory can be written to only if it is unprogrammed.
Before writing to one or more EEPROM memory
locations that are already programmed, the page or
pages containing those locations must first be erased.
EEPROM memory is erased by writing a command
byte.
The master sends a command code that tells the slave
device to erase the page. The ADM1060 command
code for a pages(s) erasure is FEh (11111110). Note
that, in order for page erasure to take place, the page
address has to be given in the previous write word
transaction (see write byte below). Also, bit 3 in regis-
ter UPDCFG (address 90h) must be set to 1.
1
SLAVE
S
ADDRESS
Figure 9b. EEPROM Page Erasure
As soon as the ADM1060 receives the command byte,
page erasure begins. The master device can send a
STOP command as soon as it sends the command
byte. Page erasure takes approximately 20ms. If the
ADM1060 is accessed before erasure is complete, it
will respond with No Acknowledge.
Write Byte/Word
In this operation the master device sends a command byte
and one or two data bytes to the slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by
the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master sends a data byte (or may assert STOP at
this point).
9. The slave asserts ACK on SDA.
10.The master asserts a STOP condition on SDA to end
the transaction.
In the ADM1060, the write byte/word protocol is used for
three purposes.
1. Write a single byte of data to RAM. In this case the
command byte is the RAM address from 00h to DFh
and the (only) data byte is the actual data. This is illus-
trated in Figure 9c.
1 2
SLAVE
S
ADDRESS
Figure 9c. Single Byte Write To RAM
2. Set up a two byte EEPROM address for a subsequent
read, write, block read, block write or page erase. In
–40–
2 3 4 5 6
COMMAND
W A BYTE A P
(FEh)
3 4 5 6 7 8
RAM
W A ADDRESS A DATA A P
(00h TO DFh)
REV. PrJ 11/02