Table of Contents
Advertisement
PROGRAMMING ADM1060
If the operation is a write operation, the first data byte
after the slave address is a command byte. This tells the
slave device what to expect next. It may be an instruc-
tion such as telling the slave device to expect a block
write, or it may simply be a register address that tells
the slave where subsequent data is to be written.
Since data can flow in only one direction as defined by
the R/W bit, it is not possible to send a command to a
slave device during a read operation. Before doing a
read operation, it may first be necessary to do a write
operation to tell the slave what sort of read operation to
expect and/or the address from which data is to be read.
3. When all data bytes have been read or written, stop
conditions are established. In WRITE mode, the master
will pull the data line high during the 10th clock pulse
1
SCL
0
SDA
START BY
MASTER
SCL
(CONTINUED
)
SDA
(CONTINUED
)
1
SCL
SDA
0
START BY
MASTER
SCL
(CONTINUED
)
SDA
(CONTINUED
)
SCL
t
HD;ST
A
SDA
t
BUF
S
P
REV. PrJ 11/02
PRELIMINARY TECHNICAL DATA
1
0
1
1
A1
A0
FRAME 1
SLAVE
ADDRESS
1
D6
D2
D7
D5
D4
D3
FRAME 3
DATA BYTE
Figure 8a. General SMBus Write Timing Diagram
1
0
1
1
A1
A0
FRAME 1
SLAVE
ADDRESS
1
D7
D6
D5
D4
D3
D2
FRAME 3
DATA BYTE
Figure 8b. General SMBus Read Timing Diagram
t
R
t
LO
W
t
HIG
t
HD;DA
H
T
Figure 8c. Diagram for Serial Bus Timing
to assert a STOP condition. In READ mode, the mas-
ter device will release the SDA line during the low
period before the 9th clock pulse, but the slave device
will not pull it low. This is known as No Acknowledge.
The master will then take the data line low during the
low period before the 10th clock pulse, then high dur-
ing the 10th clock pulse to assert a STOP condition.
9
1
D7
D6
D5
D4
R/W
ACK. BY
SLAVE
9
1
D1
D0
D7
D 6
ACK. BY
SLAVE
9
1
D6
R/W
D7
D5
D4
ACK. BY
SLAVE
FRAME 2
9
1
D1
D0
D7
D6
ACK. BY
MASTER
t
F
t
SU;DA
T
S
–39–
9
D3
D2
D1
D0
ACK. BY
SLAVE
FRAME 2
COMMAND
CODE
D5
D4
D3
D2
D1
FRAME N
DATA
BYTE
9
D2
D3
D1
D0
ACK. BY
MASTER
DATA
BYTE
D5
D4
D3
D2
D1
D0
FRAME N
DATA
BYTE
t
HD;ST
A
t
SU;STA
ADM1060
9
D0
ACK. BY
STOP
SLAVE
BY
MASTER
9
STOP
NO ACK.
BY
MASTER
t
SU;ST
O
P
Advertisement
Table of Contents
