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ADM1060–SPECIFICATIONS
(VH=4.5V to 14.4V, VPn = 3.0V to 6.0V
Parameter
POWER SUPPLY ARBITRATION
VDDCAP
POWER SUPPLY
Supply Current, I
DD
Additional current available from VDDCAP
SUPPLY FAULT DETECTORS
VH Input
Input Impedance
Threshold Ranges
Mid Range
Programming Step Size
High Range
Programming Step Size
VPn Inputs
Input Impedance
Threshold Ranges
Ultra Low Range
Programming Step Size
Low Range
Programming Step Size
Mid Range
Programming Step Size
VBn Inputs
Input Impedance
Threshold Ranges
Negative Mode:
Mid Range
Programming Step Size
Positive Mode:
Low Range
Programming Step Size
Mid Range
Programming Step Size
Absolute Accuracy
Absolute Accuracy-
Calibrated Voltage Thresholds
Threshold Programming Resolution
Digital Glitch Filter
NOTES
1
These are target specifications and subject to change.
2
At least one VPn must be >=3.0V if used as supply.
3
Logic inputs will accept input high voltages up to 5.5V even when device is operating at supply voltages below 5V.
4
Calibrated Voltage Thresholds are set at Production.
PRELIMINARY TECHNICAL DATA
2
o
o
, T
= -40
C to 85
C, unless otherwise noted.)
A
Min
2.7
2.7
2
4.8
0.6
1
2
-6
1
2
4
0
VH must be >=4.5V if used as supply.
Typ
Max
Units
V
4.75
5.1
V
4.75
5.1
V
3
mA
5
mA
1
mA
52
k
6
V
15.6
m V
14.4
V
37.6
m V
52
k
1.8
V
4.7
m V
3
V
7.8
m V
6
V
15.6
m V
190
k
52
k
30
k
-2
V
15.6
m V
3
V
7.8
m V
6
V
15.6
m V
2.5
%
1.0
%
8
100
s
– 4 –
Test Conditions/Comments
Any VPn>=3.0V
VH>=4.5V
Any VPn=6.0V
VH=14.4V
VDDCAP=4.75V, no PDO FET
Drivers on, no loaded PDO pullups
to VDDCAP
VDDCAP=4.75V, all PDO FET
Drivers on (loaded with 1 A), no
PDO pullups to VDDCAP
Max. additional load that can be
drawn from PDO pullups to
VDDCAP
From VH to GND
From VPn to GND
From VBn to 2.25V (Internal Ref.)
From VBn to GND (positive mode)
From VBn to GND (negative mode)
o
o
TA=0
C to 85
C, Threshold
Voltage>0.9V
Bits
See figure 3. 8 timeout options
between 0 and 100 s
REV.PrJ11/02
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