General Purpose Inputs (Gpi's); Logic State Of The Gpi's (And Other Logic Inputs) - Analog Devices ADM1060 Manual

ADM1060 INPUTS

GENERAL PURPOSE INPUTS (GPI'S)

The ADM1060 has 4 General Purpose Logic Inputs
(GPI's). These are TTL/CMOS logic level compatible.
Standard logic signals can be applied to the pins (eg)
RESET from reset generators, PWRGOOD signals, Fault
flags, Manual Resets etc. These signals can be gated with
the other inputs supervised by the ADM1060, and used to
control the status of the PDO's. The inputs can be simply
buffered, or a logic transition can be detected and a pulse
output generated. The width of this pulse is
programmable from 10 s to a maximum of 10ms.
configuration of the GPI's is shown in the register and
bitmaps below.
The GPI's also feature a glitch filter, similar to that
provided on the SFD's. This enables the user to ignore
spurious transitions on the GPI's.
TABLE 20. LIST OF REGISTERS FOR THE GENERAL PURPOSE INPUTS (GPIN)
Hex Table Name
Address
98 GPI4CFG
99 GPI3CFG
9 A GPI2CFG
9 B GPI1CFG
TABLE 21. BIT MAP FOR GPInCFG REGISTERS (POWER- ON DEFAULT 00H)
Bit Name
7 Reserved
6 INVIN
5 INTYP
4-3 PULS1-0
2-0 GF2-GF0
REV. PrJ 11/02
PRELIMINARY TECHNICAL DATA
The
For example, the glitch
Default
Power On Value
00h
00h
00h
00h
R/W
N/A
R / W
R / W
R / W
R / W
filter can be used to debounce a Manual Reset switch.
The length of the glitch filter can also be programmed.
LOGIC STATE OF THE GPI'S (AND OTHER LOGIC
INPUTS)
Each of the GPI's has a weak (10 A) pull-down current
source. The current sources can be connected to the
inputs by progamming the relevant bit in a register
(PDEN). This enables the user to control the condition
of these inputs, pulling them to GND, even when they are
unused or left floating.
Note that the same pull- down function is provided for the
SMBus address pins, A0 and A1 and for the WDI pin. A
register is used to program which of the inputs is
connected to the current sources.
Description
Setup of the glitch filter delay, pulse width, level/edge
detection etc. configuration of
Setup of the glitch filter delay, pulse width, level/edge
detection etc. configuration of
Setup of the glitch filter delay, pulse width, level/edge
detection etc. configuration of
Setup of the glitch filter delay, pulse width, level/edge
detection etc. configuration of
Description
Cannot be used
If high, invert Input
Determines whether a level or an edge is detected on the pin. If an edge
is detected then positive pulse of programmable length is outputted
INTYP Detect
0 Detect level
1 Detect edge
Length of pulse outputted once an edge has been detected on input
PULS1 PULS0 Pulse Length Selected ( s)
0 0 10
0 1 100
1 0 1000
1 1 10000
Length of time for which the input is ignored
GF2 GF1 GF0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
–15–
ADM1060
GPI4
GPI3
GPI2
GPI1
Glitch Filter Delay ( s)
0
5
10
20
30
50
75
100