4.3
System Memory
The P2020 integrated memory controller supports both DDR2 and DDR3 memory devices.
It has one channel and can be configured up to four memory banks with x8, x16 and x32
devices. Selection of 4GB devices allows support up to 16GB of memory. ECC is also
supported.
The MVME2502 design implements 2 banks of 9x8 devices which includes ECC. The
standard configurations populate a single memory bank of 2Gb DDR3-800 for a 2GB
capacity. The MVME2502 is designed to accommodate 4Gb DDR3 devices supporting up
to 8Gb total when both memory banks are populated with 4Gb devices.
4.4
Timers
There are various timer functions implemented on the MVME2502 board:
4.4.1
Real Time Clock
The MVME2502 implements a Maxim DS1337 RTC to maintain seconds, minutes, hours,
day, date, month, year accurately. The INT_A pin of the DS1337 is connected to the CPU
GPIO[1] pin to allow the DS1337 to generate interrupts to the CPU. Access to the DS1337
is provided via the I
The MVME2502 provides a socketed 190mAh primary battery to power the RTC when the
module is out of service.
4.4.2
P2020 Internal Timer
The processor's internal timer is composed of eight global timers divided into two groups of
four timers each. Each timer has four individual configuration registers and they cannot be
cascaded together.
4.4.3
Watchdog Timer
The on-board CPLD provides programmable 16-bit watchdog timers. It has a 1 ms
resolution and generates a board reset when the counter expires. Interrupt is generated to
the processor when this occurs. Default value is 60 seconds.
4.4.4
CPLD Tick Timer
The MVME2502 supports three independent 32-bit timers that are implemented on the
CPLD to provide fully programmable registers for the timers.
MVME2502 Installation and Use (6806800R96L)
2
C port 0 from the CPU and responds to a base I
Functional Description
2
C address of $D0.
81
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