Pld Shutdown And Reset Control And Reset Reason Register; Table 5-19 Pld Shutdown And Reset Control And Reset Reason Register - SMART Embedded Computing Penguin Edge MVME250 Series Installation And User Manual

Memory Maps and Registers
NMI
TICK0_INT
TICK1_INT
TICK2_INT
5.5.16 PLD Shutdown and Reset Control and Reset Reason
Register
The MVME2502 provides an 8-bit register to execute the shutdown and reset commands.
The board's reset reason is also included in this register.

Table 5-19 PLD Shutdown and Reset Control and Reset Reason Register

REG PLD Shutdown and Reset Reason- 0xFFDF00FF
Bit 7
Field RSVD Shutdown
OPER R
RESET 0
Field Description
Shutdown
Note: If a board entered the shutdown state (by writing a '1' in this register), the chassis'
power needs to be cycled to power up the board again.
Soft_RST
110
Abort switch interrupt if pressed less than three seconds.
1 - Interrupt enabled
0 - No Interrupt
Tick Timer 0 interrupt
1 - Interrupt enabled
0 - No Interrupt
Tick Timer 1 interrupt
1 - Interrupt enabled
0 - No Interrupt
Tick Timer 2 interrupt
1 - Interrupt enabled
0 - No Interrupt
6 5 4
Soft_ Clear_
RST Cause
W W W
0 0 0
Board Shutdown Register
1 - Shutdown Enable
0 - Shutdown Disable
Board Soft Reset (self clearing)
1 - Execute soft reset
0 - No reset
3 2
CPU_ WD_TIME
RESET OUT
R
X X
MVME2502 Installation and Use (6806800R96L)
Memory Maps and Registers
1 0
LRSTO Sft_RST
X X