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SMART Embedded Computing MVME2502 Installation And Use Manual

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MVME2502
Installation and Use
P/N: 6806800R96G
September 2019

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  • Page 1 MVME2502 Installation and Use P/N: 6806800R96G September 2019...
  • Page 2 Computing” and the SMART Embedded Computing logo are trademarks of SMART Modular Technologies, Inc. All other names and logos referred to are trade names, trademarks, or registered trademarks of their respective owners. These materials are provided by SMART Embedded Computing as a service to its customers and may be used for informational purposes only. Disclaimer* SMART Embedded Computing (SMART EC) assumes no responsibility for errors or omissions in these materials.

  • Page 3: Table Of Contents

    2.5.2 PMC/XMC Support..........39 2.5.3 Installation of MVME2502-HDMNTKIT1/MVME2502-HDMNTKIT2... . . 40 Installing and Removing the Board .
  • Page 4 System Memory ............79 MVME2502 Installation and Use (6806800R96G)
  • Page 5 Overview ............. . . 95 MVME2502 Installation and Use (6806800R96G)
  • Page 6 6.3.3 Booting from a USB Drive ......... . . 117 MVME2502 Installation and Use (6806800R96G)
  • Page 7 MVME2502 Specific U-Boot Commands ........
  • Page 8 Table of Contents MVME2502 Installation and Use (6806800R96G)
  • Page 9 Battery Location ENP2 Variant ........136 MVME2502 Installation and Use (6806800R96G)
  • Page 10 Table of Contents MVME2502 Installation and Use (6806800R96G)
  • Page 11 PLD Month Register ..........99 MVME2502 Installation and Use (6806800R96G)
  • Page 12 Table 6-1 MVME2502 Specific U-Boot Commands ....... . . 120 Table 7-1 POR Configuration Settings .

  • Page 13: About This Manual

    U-Boot system and MVME Chassis. The purpose of this manual is to describe MVME2502 product and the services it provides. This manual includes description of MVME2502 product hardware, firmware and also information about operating system.
  • Page 14 PCI Mezzanine Card Input/Output Module Programmable Logic Device PCI Mezzanine Card (IEEE P1386.1) PrPMC Processor PCI Mezzanine Card Real-Time Clock Rear Transition Module SATA Serial Advanced Technology Attachment SDHC Secure Digital Host Controller Surface Mounted Technology MVME2502 Installation and Use (6806800R96G)
  • Page 15 Repeated item for example node 1, node 2, ..., node 12 Omission of information from example/command that is not necessary at the time Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used in registers) Logical OR MVME2502 Installation and Use (6806800R96G)
  • Page 16 Indicates an electrical situation that could result in moderate injury or death Indicates that when working in an ESD environment care should be taken to use proper ESD practices No danger encountered, pay attention to important information MVME2502 Installation and Use (6806800R96G)
  • Page 17 6806800R96C August 2014 changed PHY addresses in Table 7-4 PHY Types and MII Management Bus Address. Re-branded to Artesyn template. Added MVME2502 Declaration of Conformity on page 22. Added Flash Memory Map and updated SPI 6806800R96B April 2014 Flash Memory, Reset Switch and PMC/XMC Sites.
  • Page 18 About this Manual About this Manual MVME2502 Installation and Use (6806800R96G)

  • Page 19: Safety Notes

    Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment. SMART Embedded Computing intends to provide all necessary information to install and handle the product in this manual. Because of the complexity of this product and its various uses, we do not guarantee that the given information is complete.
  • Page 20 Product Damage Only use injector handles for board insertion to avoid damage to the front panel and/or PCB. Deformation of the front panel can cause an electrical short or other board malfunction. MVME2502 Installation and Use (6806800R96G)
  • Page 21 Data Loss Exchanging the battery can result in loss of time settings. Backup power prevents the loss of data during exchange. Quickly replacing the battery may save time settings. MVME2502 Installation and Use (6806800R96G)
  • Page 22 PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder. To prevent damage, do not use a screw driver to remove the battery from its holder. MVME2502 Installation and Use (6806800R96G)

  • Page 23: Sicherheitshinweise

    Verletzungen oder Schäden am Produkt zur Folge haben. SMART Embedded Computing ist darauf bedacht, alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen. Da es sich jedoch um ein komplexes Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir die Vollständigkeit der im Handbuch enthaltenen Informationen nicht...
  • Page 24 Funktionen belegt sein. Das Ändern dieser Schalter kann im normalen Betrieb Störungen auslösen. Verstellen Sie nur solche Schalter, die nicht mit 'Reserved' gekennzeichnet sind. Prüfen und ggf. ändern Sie die Einstellungen der nicht mit 'Reserved' gekennzeichneten Schalter, evor Sie das Produkt installieren. MVME2502 Installation and Use (6806800R96G)
  • Page 25 Stellen Sie sicher, dass die Länge eines mit Ihrem Produkt verbundenen TPE- Kabels 100 m nicht überschreitet.  Das Produkt darf über die TPE-Stecker nur mit einem Sicherheits- Kleinspannungs-Stromkreis (SELV) verbunden werden. Bei Fragen wenden Sie sich an Ihren Systemverwalter. MVME2502 Installation and Use (6806800R96G)
  • Page 26 Batteriehalter beschädigt werden. Um Schäden zu vermeiden, sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden. Umweltschutz Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung, wenn möglich immer umweltfreundlich. MVME2502 Installation and Use (6806800R96G)

  • Page 27: Introduction

    The MVME2502 is designed to work in VMEbus chassis with a 3-row backplane connector environment with a reduced I/O capacity and reduced peripheral power. It is also designed to work in a more modern and higher performance VME chassis environment with a 5-row backplane connector in the 2eVME or the 2eSST protocol mode.
  • Page 28 Boot firmware: U-Boot-based firmware image in 16MB SPI Flash. This flash is split into two 8MB chips.  VMEbus interface Controller: Tsi148 PCI-X to VMEbus bridge with support for VME64 and 2eSST protocols  CPLD: Watchdog, timers, and registers MVME2502 Installation and Use (6806800R96G)

  • Page 29: Standard Compliances

    Mechanical Data Feature Value Height 233.44mm (9.2 inches) Depth 160.0mm (6.3 inches) Front Panel Height 261.8mm (10.3 inches) Width 19.8mm (0.8 inches) Max. Component Height 14.8mm (0.58 inches) Weight 400 grams (ENP1), 700 grams (ENP2) MVME2502 Installation and Use (6806800R96G)

  • Page 30: Ordering Information

    Introduction Introduction Ordering Information Refer to the data sheet for the MVME2502 for a complete list of available variants and accessories. Refer to Appendix B, Related Documentation or consult your local SMART Embedded Computing sales representative for the availability of other variants.

  • Page 31: Figure 1-2 Serial Number Location-Enp2 Variant

    Introduction Figure 1-2 Serial Number Location-ENP2 Variant MVME2502 Installation and Use (6806800R96G)
  • Page 32 Introduction Introduction MVME2502 Installation and Use (6806800R96G)

  • Page 33: Hardware Preparation And Installation

    Installation instructions for the optional PMC/XMC modules and transitions modules are also included. A fully implemented MVME2502 consists of the base board and the following modules:  PCI Mezzanine Card (PMC) or PCI-E Mezzanine Card (XMC) for added versatility ...

  • Page 34: Unpacking And Inspecting The Board

    The product is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, contact customer service immediately. Requirements Make sure that the board meets the following requirements when operated in your particular system configuration. MVME2502 Installation and Use (6806800R96G)

  • Page 35: Environmental Requirements

    High humidity and condensation on the board surface causes short circuits. Do not operate the board outside the specified environmental limits. Make sure that the board is completely dry and there is no moisture on any surface before applying power. MVME2502 Installation and Use (6806800R96G)

  • Page 36: Power Requirements

    The power is measured when the board is in standby (Linux prompt) mode. Power will significantly increase when adding hard drives or a XMC/PMC card. The following table shows the power available when the MVME2502 is installed in either a three row or five row chassis and when PMCs are present.

  • Page 37: Equipment Requirements

    Hardware Preparation and Installation 2.3.3 Equipment Requirements The following are recommended to complete a MVME2502 system:  VMEbus system enclosure  System console terminal  Operating system (and/or application software)  Transition module and connecting cables Configuring the Board The board provides software control over most options. Settings can be modified to fit the user's specifications.

  • Page 38: Installing Accessories

    2.5.1 Rear Transition Module The MVME2502 does not support hot swap. Remove power to the rear slot or the system before installing the module. A PCMI/O Module (PIM) needs to be manually configured and installed before placing the transition module.

  • Page 39: Pmc/Xmc Support

    1. Attach an ESD strap to your wrist. Attach the other end of the strap to the chassis as a ground. Make sure that it is securely fastened throughout the procedure. 2. Remove the PMC/XMC filler plate from the front panel cut-out. MVME2502 Installation and Use (6806800R96G)

  • Page 40: Installation Of Mvme2502-Hdmntkit1/Mvme2502-Hdmntkit2

    When removing the PMC/XMC, hold it by its long side and exert minimal force when pulling it from the baseboard to prevent pin damage. 2.5.3 Installation of MVME2502-HDMNTKIT1/MVME2502- HDMNTKIT2 Installation Procedure 1. Attach washers and hex standoffs to HDD received with the MVME2502-HDMNTKIT1 or MVME2502-HDMNTKIT2. MVME2502 Installation and Use (6806800R96G)
  • Page 41 2. Assemble the SATA adapter board to the blade and ensure that it is properly aligned with the standoff. Attach the screws to anchor the SATA adapter board to the blade. NOTE: The 3.3V key must be removed to install the SATA kit. 3. Attach hex standoff to main board. MVME2502 Installation and Use (6806800R96G)
  • Page 42 Hardware Preparation and Installation Hardware Preparation and Installation 4. Attach HDD with interface PCB to main board using screws as shown below: MVME2502 Installation and Use (6806800R96G)

  • Page 43: Installing And Removing The Board

    This section describes the recommended procedure for installing the board in a chassis. Read all warnings and instructions before installing the board. The MVME2502 does not support hot swap. Power off the slot or system and make sure that the serial ports and switches are properly configured.

  • Page 44: Completing The Installation

     Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits (SELV circuits). If in doubt, ask your system administrator. The console settings for the MVME2502 are:  Eight bits per character ...

  • Page 45: Controls, Leds, And Connectors

    Chapter 3 Controls, LEDs, and Connectors Board Layout The following figure shows the components and connectors on the MVME2502 board. Figure 3-1 Board Layout ENP1 Variant MVME2502 Installation and Use (6806800R96G)

  • Page 46: Figure 3-2 Board Layout Enp2 Variant

    Controls, LEDs, and Connectors Controls, LEDs, and Connectors Figure 3-2 Board Layout ENP2 Variant MVME2502 Installation and Use (6806800R96G)

  • Page 47: Front Panel

    Controls, LEDs, and Connectors Front Panel The following components are found on the MVME2502 ENP1 and ENP2 front panel. Figure 3-3 Front Panel LEDs, Connectors and Switches PMC/XMC 2 PMC/XMC 1 USER 1 Reset Switch Serial Port FAIL SPEED ETH 1...

  • Page 48: Reset Switch

    3.2.1 Reset Switch The MVME2502 has a single push button switch that has both the abort and the reset functions. Pressing the switch for less than three seconds generates an abort interrupt if there is firmware that will read the GPIO2 (0xffdf0095) interrupt register. U-boot does not implement any interrupts and also does not detect the interrupt or display anything when the button is pressed.
  • Page 49 Front panel No link GENET2 TSEC2 Integrated Amber 10/100BASE-T operation SPEED Link/Speed RJ-45 LED Green 1000BASE-T operation (Left) No activity Front panel GENET2 TSEC2 Integrated Blinking Green Activity proportional to bandwidth Activity RJ-45 LED utilization MVME2502 Installation and Use (6806800R96G)

  • Page 50: On-Board Leds

    Controlled by the CPLD. Used for boot-up sequence User Defined Amber indicator. Early Power Fail Amber This indicator is lit when the early 3.3V power supply fails. User Defined Amber Controlled by the CPLD User Defined Amber Controlled by the CPLD MVME2502 Installation and Use (6806800R96G)

  • Page 51: Connectors

    3.4.1 Front Panel Connectors The following connectors are found on the outside of the MVME2502 board. These connectors are divided between the front panel connectors and the backplane connectors. The front panel connectors include the J1 and the J5 connectors. The backplane connectors include the P1 and the P2 connectors.

  • Page 52: Front Panel Serial Port (J4)

    DB-9 front panel connector. A male-to-male micro-mini DB9 adapter cable is available under SMART EC part number SERIAL-MINI-D (30-W2400E01A). The pin assignments for these connectors are as follows: Table 3-4 Front Panel Serial Port (J4) Signal Description MVME2502 Installation and Use (6806800R96G)

  • Page 53: Usb Connector (J5)

    Controls, LEDs, and Connectors 3.4.1.3 USB Connector (J5) The MVME2502 uses upright USB receptacle mounted in the front panel. Table 3-5 USB Connector (J5) Pin Name Signal Description Data - Data + Mounting Ground Mounting Ground Mounting Ground Mounting Ground 3.4.1.4...
  • Page 54 IRQ5 ADD 34 +3.3V (not used) ADD 4 IRQ4 ADD 35 ADD 3 IRQ3 ADD 36 +3.3V (not used) ADD 2 IRQ2 ADD 37 ADD 1 IRQ1 ADD 38 +3.3V (not used) -12V +12V +12V MVME2502 Installation and Use (6806800R96G)

  • Page 55: Vmebus P2 Connector

    The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the MVME2502 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines. The Z, A, C, and D pin assignments for the P2 connector are the same for both the...

  • Page 56: On-Board Connectors

    The on-board customized SATA connector is compatible with SATA kit, namely VME-64GBSSDKIT and iVME7210-MNTKIT. Table 3-8 Custom SATA Connector (J3) Signal Description Signal Description SATA POWER ENABLE SATA TX + SATA DETECT SATA TX - MVME2502 Installation and Use (6806800R96G)

  • Page 57: Pmc Connectors

    +3.3V 3.4.2.2 PMC Connectors The MVME2502 supports two PMC sites. It utilizes J14 to support PMC I/O that goes to the RTM PMC. The tables below show the pin out detail of J11/J111, J12/J222, J13/J333 and J14. See Figure 3-1 for the location of the PMC connectors.
  • Page 58 AD 31 CBE0 AD 28 AD 6 AD 27 AD 5 AD 25 AD 4 +3.3V CBE3 AD 3 AD 22 AD 2 AD 21 AD 1 AD 19 AD 0 +3.3V AD 17 REQ64 MVME2502 Installation and Use (6806800R96G)

  • Page 59: Table 3-10 Pmc J12/J222 Connector

    AD 14 BUSMODE3 (PULLED DWN) AD 13 +3.3V M66EN BUSMODE4 (PULLED DWN) AD 10 AD 8 +3.3V AD 30 AD 7 AD 29 REQB +3.3V AD 26 GNTB AD 24 +3.3V IDSEL AD 23 EREADY MVME2502 Installation and Use (6806800R96G)

  • Page 60: Table 3-11 Pmc J13/J333 Connector

    CBE6 AD 45 CBE5 CBE4 +3.3V AD 40 +3.3V AD 43 PAR64 AD 42 +3.3V AD 41 AD 62 AD 61 AD 40 AD 39 AD 60 AD 38 AD 59 AD 37 AD 58 MVME2502 Installation and Use (6806800R96G)

  • Page 61: Table 3-12 Pmc J14 Connector

    PMC IO 5 PMC IO 37 PMC IO 6 PMC IO 38 PMC IO 7 PMC IO 39 PMC IO 8 PMC IO 40 PMC IO 9 PMC IO 41 PMC IO 10 PMC IO 42 MVME2502 Installation and Use (6806800R96G)
  • Page 62 PMC IO 27 PMC IO 59 PMC IO 28 PMC IO 60 PMC IO 29 PMC IO 61 PMC IO 30 PMC IO 62 PMC IO 31 PMC IO 63 PMC IO 32 PMC IO 64 MVME2502 Installation and Use (6806800R96G)

  • Page 63: Jtag Connector (P6)

    SCAN 3 TCK 2 +2.5V SCAN 3 TCK 3 SCAN 3 TDI SCAN 3 TRST SCAN 3 TCK3 SCAN 4 TCK 1 SCAN 4 TMS SCAN 4 TDO SCAN 4 TCK 2 +3.3V SCAN 4 TDI MVME2502 Installation and Use (6806800R96G)

  • Page 64: Cop Connector P50(15)

    JTAG TDO COP QACK JTAG TDI COP TRST COP RUNSTOP (Pulled UP) COP VDD SENSE JTAG TCK COP CHECK STOP IN JTAG TMS P2020 SW RESET COP PRESENT COP HARD RESET KEYING COP CHECK STOP OUT MVME2502 Installation and Use (6806800R96G)

  • Page 65: Xmc Connector (Xj1)

    Controls, LEDs, and Connectors 3.4.2.5 XMC Connector (XJ1) The MVME2502 supports two XMC sites. The board only support J15 for XMC site 1 and J25 for XMC site 2. Table 3-15 XMC Connector (XJ1) Pin out Row A Row B...

  • Page 66: Xmc Connector (Xj2)

    CLK + CLK - (PULLED UP) 3.4.2.7 Miscellaneous P2020 Debug Connectors(P4) This is used for processor debugging. It is a depopulated connector labeled P4, located at the bottom side of the board near the processor. MVME2502 Installation and Use (6806800R96G)

  • Page 67: Switches

    Geographical Address Switch (S1) The Tsi148 VMEbus Status Register provides the VMEbus geographical address of the MVME2502. The switch reflects the inverted states of the geographical address signals. Applications not using the five row backplane can use the geographical address switch to assign a geographical address based on the following diagram.

  • Page 68: Figure 3-6 Geographical Address Switch

    VME SCON SEL switch. 2. The VME SCON SEL switch is OFF to select non-SCON mode. The switch is ON to select always SCON mode. This switch is only effective when the VME SCON MAN switch is "ON". MVME2502 Installation and Use (6806800R96G)

  • Page 69: Smt Configuration Switch (S2)

    OFF (Flash Block A) Boot Block B Select OFF (WP disabled) FLASH_WP_N Flash Write Protect PMC_XMC_ XMC/PMC - Manual Will select if XMC card or OFF (Auto) Detect or Auto Detect PMC card is used MVME2502 Installation and Use (6806800R96G)
  • Page 70 User Defined switch that will select if the GBE_MUX_ OFF (Front) GBE PHY will function on the front panel or on the Back PLANE OFF (CPU Reset Should be OFF for normal Reserved Deasserted) operation. MVME2502 Installation and Use (6806800R96G)

  • Page 71: Functional Description

    Chapter 4 Functional Description Block Diagram The MVME2502 block diagram is illustrated in Figure 4-1. All variants provide front panel access to one serial port via a micro-mini DB-9 connector, two 10/100/1000 Ethernet port (one is configurable to be routed to the front panel or the rear panel) through a RJ-45 connector and one Type A USB Port.

  • Page 72: Chipset

    Functional Description Functional Description Chipset The MVME2502 utilizes the QorIQ P20x0 integrated processor. It offers an excellent combination of protocol and interface support which includes the following components.  QorIQ P2020 integrated processor or e500 processor core  PCI Express interface ...

  • Page 73: Pci Express Interface

    4.2.5 Secure Digital Host Controller (SDHC) The ENP1 and ENP2 variants of the MVME2502 use a soldered down 8GB eMMC device connected to the SDHC interface of the P2020 processor. This is the only device available on the SDHC interface.

  • Page 74: Usb Interface

    The P2020 has a total of sixteen I/O ports. Four of these ports are used alternately as external input interrupt. All sixteen ports have open drain capabilities. The table below details the GPIO usage for the MVME2502: Table 4-1 P2020 GPIO Functions...

  • Page 75: Security Engine (Sec) 3.1

    It includes eight different execution units where data flows in and out of an NOTE: The standard versions of the MVME2502 do not use the encryption enabled versions of the P2020 processor.

  • Page 76: Common On-Chip Processor (Cop)

    Core clock=1200MHz UART_SOUT1 cfg_core1pii[0:2] READY_P1 ENP2: 2.5:1 ratio, CCB clock= 400MHz, Core clock=1000MHz LA27 cfg_cup0_boot CPU0 boot without waiting. CPU1 holdoff LA16 cfg_cpu1_boot LGPL3/LFW Boot sequencer is disabled. cfg_boot_seq[0:1] No I2C ROM is accessed (default) PLGPL5 MVME2502 Installation and Use (6806800R96G)
  • Page 77 Core1 clock frequency is greater than 1000MHz ENP2: Core1 clock frequency is less than or equal to 1000MHz DDR Controller complex clock frequency (same as DDR rate) is LA26 cfg_ddr_speed greater than or equal to 500 MHZ (default) MVME2502 Installation and Use (6806800R96G)
  • Page 78 Rapid IO interface not used => TSEC2_TXD[4:2] cfg_device_ID[7:5] default values used No default value. Input pins do not LAD[0:15] cfg_gpinput[0:15] have internal pull-up resistors Rapid IO interface not used => LGPL0 cfg_rio_sys_size default values used MVME2502 Installation and Use (6806800R96G)

  • Page 79: System Memory

    I C port 0 from the CPU and responds to a base I C address of $D0. The MVME2502 provides a socketed 190mAh primary battery to power the RTC when the module is out of service. 4.4.2...

  • Page 80: Ethernet Interfaces

    4.6.1 SPI Flash Memory The MVME2502 has two 8 MB on-board serial flash. Both contain the ENV variables and the U-Boot firmware image, which is about 513 KB in size. Both SPI flash contain the same programming for firmware redundancy and crisis recovery. The SPI flash is programmed through the JTAG interface or through an on-board SPI flash programming header.

  • Page 81: Spi Flash Programming

    An external JTAG board with a JTAG multiplexer is compatible with the MVME2502 and is attached using an external cable. It is used to update the boot loader in the field. Using this method, programming is done through the JTAG interface or by using the dedicated SPI Flash programming header on the JTAG board.

  • Page 82: Crisis Recovery

    Functional Description Functional Description The MVME2502 CPLD controls the chip select to SPI devices A and B. The CPLD chip select control is based on the Switch Bank (S2-2). Figure 4-2 SPI Device Multiplexing Logic On power-up, the selection of the SPI boot device is strictly based upon the Switch Bank (S2-2) setting.

  • Page 83: Front Uart Control

    The board will automatically switch over if one of the devices is corrupted. Front UART Control The MVME2502 utilizes one of the two UART functions provided in the male micro-mini DB-9 front panel. A male-to-male micro-mini DB-9 to DB9 adapter cable is available under SMART EC Part Number SERIAL-MINI-D (30-W2400E01A) and is approximately 12 inches in length.

  • Page 84: Pmc/Xmc Sites

    PMC site. At PMC site 2, the 5 volt keying pin hole is used to mount the SATA adapter card. Warning label covers 5 volt keying pin at PMC site 1 and also at PMC site 2. If 5 volt PMC or XMC devices are operated on MVME2502 it may cause damage to the board.

  • Page 85: Pmc Add-On Card

    4.9.1 PMC Add-on Card The MVME2502 PMC interface utilizes IDT’s TSI384 as the PCIe/PCI-X bridge. It supports up to 8.5Gbps (64 bits x 133MHz). The on-board switch S2-5 configures the Tsi384 to run on either 100MHz or 133MHz, with 133MHz as default.

  • Page 86: 4.11.1 Tsi148 Vme Controller

    Functional Description 4.11.1 Tsi148 VME Controller The VMEbus interface for the MVME2502 is provided by the Tsi148 VMEbus controller. The Tsi148 provides the required VME, VME extensions, and 2eSST functions. TI SN74VMEH22501transceivers are used to buffer the VME signals between the Tsi148 and the VME backplane.

  • Page 87: Reset/Control Cpld

    Power control and fault detection  Reset sequence and reset management  Status and control registers  Miscellaneous control logic  Watchdog timer  32-bit Tick Timer  Clock generator  Switch decoder and LED controller MVME2502 Installation and Use (6806800R96G)

  • Page 88: Power Management

    4.15 Power Management The MVME2502 backplane is utilized to derive +3.3V, +2.5V, +1.8V, +1.5V, +1.2V, +1.05V voltage rail. Each voltage rail is controlled by the CPLD through an enable pin of the regulator, while the output is monitored through power good signal. If a voltage rail fails, the CPLD will disable all of the regulators.

  • Page 89: Clock Structure

    Functional Description 4.16 Clock Structure A total of three IDT chips, a discrete oscillator and crystal to support all the clock requirements of MVME2502. Figure 4-3 Clock Distribution Diagram MVME2502 Installation and Use (6806800R96G)

  • Page 90: Reset Structure

    4.17 Reset Structure The MVME2502 reset will initiate after the power up sequence if the 1.5 V power supply is GOOD. When the board is at READY state, the reset logic will monitor the reset sources and implement the necessary reset function.

  • Page 91: Debugging Support

    4.20.2 JTAG Chain and Board The MVME2502 is designed to work with separate JTAG board rather than with an on- board JTAG multiplexer. The chip supports up to a 6-scan port and the board’s boundary scan requires the following to function: ASSET hardware, JTAG board, and JTAG cable.

  • Page 92: Custom Debugging

    Functional Description The JTAG board provides three different connectors for the ASSET hardware, flash programming and the MVME2502 JTAG connector. The board is equipped with TTL buffers to help improve the signal quality as it traverses over the wires. Figure 4-4 JTAG Chain Diagram 4.20.3...

  • Page 93: Rear Transition Module (Rtm)

    Functional Description 4.21 Rear Transition Module (RTM) The MVME2502 RTM Block diagram is illustrated below: Figure 4-5 RTM Block Diagram The MVME2502 is compatible with the MVME7216E RTM. The MVME7216E RTM is for I/O routing through the rear of a compact VMEbus chassis. It connects directly to the VME backplane in chassis with an 80 mm deep rear transition area.
  • Page 94 Functional Description Functional Description MVME2502 Installation and Use (6806800R96G)

  • Page 95: Memory Maps And Registers

    Memory Maps and Registers Overview The system resources including system control and status registers, external timers, and the QUART are mapped into 16MB address range accessible from the MVME2502 local bus through the P2020 QorIQ LBC. Memory Map The following table shows the physical address map of the MVME2502.

  • Page 96: Flash Memory Map

    PCIE1 IO 0xffc20000 0xffc2ffff 64KB QUART0 0xffc40000 0xffc4ffff 64KB QUART1 0xffc50000 0xffc5ffff 64KB QUART2 0xffc60000 0xffc6ffff 64KB QUART3 0xffc70000 0xffc7ffff 64KB Timer 0xffc80000 0xffc8ffff 64KB CPLD 0xffdf0000 0xffdf0fff ecm local access window CCSR 0xffe00000 0xffe00ffff MVME2502 Installation and Use (6806800R96G)

  • Page 97: Table 5-3 Linux Devices Memory Map

    0xffe25000 0xffe25fff ETSEC3 CCSR 0xffe26000 0xffe26fff SDHCI CCSR 0xffe2e000 0xffe2efff Crypto CCSR 0xffe30000 0xffe3ffff 64KB msi CCSR 0xffe41600 0xffe4167f 128B mpic CCSR 0xffe40000 0xffe7ffff 256KB Global Utilities CCSR 0xffee0000 0xffee0fff L2 Cache Mem 0xf0f80000 0xf0ffffff 512KB MVME2502 Installation and Use (6806800R96G)

  • Page 98: Programmable Logic Device (Pld) Registers

    Memory Maps and Registers Programmable Logic Device (PLD) Registers 5.5.1 PLD Revision Register The MVME2502 provides a PLD revision register that is read by the system software to determine the current version of the timers/registers PLD. Table 5-4 PLD Revision Register...

  • Page 99: Pld Month Register

    Memory Maps and Registers 5.5.3 PLD Month Register The MVME2502 PLD provides an 8-bit register which contains the build month of the timers/registers PLD. Table 5-6 PLD Month Register PLD Year Register - 0xFFDF0005 Field PLD_REV OPER RESET 0x11 5.5.4...

  • Page 100: Pld Power Good Monitor Register

    Memory Maps and Registers Memory Maps and Registers 5.5.6 PLD Power Good Monitor Register The MVME2502 PLD provides an 8-bit register which indicates the instantaneous status of the supply’s power good signals. Table 5-9 PLD Power Good Monitor Register PLD PWRDG_MNTR - 0xFFDF0012...

  • Page 101: Pld Pci/Pmc/Xmc (Slot1) Monitor Register

    For more information on LEDs, refer to Table 3-1 Table 3-2. 5.5.8 PLD PCI/PMC/XMC (Slot1) Monitor Register The MVME2502 PLD provides an 8-bit register which indicates the status of the PCI/PMC/XMC interface signals. Table 5-11 PLD PCI/PMC/XMC (Slot1) Monitor Register PLD PCI_PMC_XMC_MNTR - 0xFFDF001D MUX1_S...

  • Page 102: Pld Pci/Pmc/Xmc (Slot2) Monitor Register

    Memory Maps and Registers Memory Maps and Registers 5.5.9 PLD PCI/PMC/XMC (Slot2) Monitor Register The MVME2502 PLD provides an 8-bit register which indicates the status of the SATA/PMC/XMC interface signals. Table 5-12 PLD PCI/PMC/XMC (Slot2) Monitor Register PLD PCI_PMC_XMC_MNTR - 0xFFDF001F...

  • Page 103: Pld U-Boot And Tsi Monitor Register

    Memory Maps and Registers 5.5.10 PLD U-Boot and TSI Monitor Register The MVME2502 PLD provides an 8-bit register which indicates the status of the U-Boot's normal environment switch and TSI interface signals. Table 5-13 PLD U-Boot and TSI Monitor Register...

  • Page 104: Pld Write Protect And I C Debug Register

    PLD Write Protect and I C Debug Register The MVME2502 PLD provides an 8-bit register which is used to indicate the status of I and SPI write-protect manual switches and is used to control the SPI write-enable. The I debug ports are also provided in this register which is used in controlling the bus’ status.

  • Page 105: Pld Test Register 1

    AND connection between the two ports. 5.5.13 PLD Test Register 1 The MVME2502 PLD provides an 8-bit general purpose read/write register which is used by the software for PLD testing or general status bit storage. Table 5-16 PLD Test Register 1...

  • Page 106: Pld Test Register 2

    5.5.15 PLD GPIO2 Interrupt Register The abort switch, Tick Timer 0, 1 and 2 interrupts are ORed together. The MVME2502 provides an interrupt register that the system software reads to determine which device the interrupt originated from. GPIO2 will be driven low if any of the interrupts asserts.

  • Page 107: Pld Shutdown And Reset Control And Reset Reason Register

    5.5.16 PLD Shutdown and Reset Control and Reset Reason Register The MVME2502 provides an 8-bit register to execute the shutdown and reset commands. The board's reset reason is also included in this register. Table 5-19 PLD Shutdown and Reset Control and Reset Reason Register...

  • Page 108: Emmc Reset Register

    1 - Reset is due to Soft_RST register being set, or the front panel switch being pressed more than three 0 - None 5.5.17 EMMC Reset Register The MVME2502 provides a register for EMMC Reset. Table 5-20 PLD Shutdown and Reset Control and Reset Reason Register EMMC Reset Register EMMC_R...

  • Page 109: Pld Watchdog Timer Refresh Register

    Memory Maps and Registers 5.5.18 PLD Watchdog Timer Refresh Register The MVME2502 provides a watchdog timer refresh register. Table 5-21 PLD Watchdog Timer Refresh Register PLD Watch Dog Timer Load - 0xFFC80600 7 6 5 4 3 2 1 0...

  • Page 110: Pld Watchdog Timer Count Register

    Setting this register to 0xEA60 or 60,000 counts will provide a watchdog timeout of 60 seconds. 5.5.21 PLD Watchdog Timer Count Value Register The MVME2502 provides a watchdog timer count value register. Table 5-24 PLD Watchdog Timer Count Register PLD Watchdog Timer Count Value- 0xffc80608...

  • Page 111: External Timer Registers

    Memory Maps and Registers External Timer Registers The MVME2502 provides a set of tick timer registers to access the three external timers implemented in the timers/registers PLD. These registers are 32-bit and are word writable. The following sections describe the timer prescaler and control register: 5.6.1...

  • Page 112: Control Registers

    If the clear-on- compare mode is enabled, the counter is also cleared. For periodic interrupts, this equation should be used to calculate the compare value for a specific period (T): Compare register value=T (us) MVME2502 Installation and Use (6806800R96G)
  • Page 113 Tick Timer 0 Compare Value Low Word - 0xFFC80206 Tick Timer 1 Compare Value Low Word - 0xFFC80306 Tick Timer 2 Compare Value Low Word - 0xFFC80406 Field TickTimer Compare Value Low Word (16-bits) OPER RESET 0x0000 MVME2502 Installation and Use (6806800R96G)

  • Page 114: Counter High And Low Word Registers

    Tick Timer 0 Counter Value Low Word - 0xFFC8020A Tick Timer 1 Counter Value Low Word - 0xFFC8030A Tick Timer 2 Counter Value Low Word - 0xFFC8040A Field TickTimer Counter Value Low Word (16-bits) OPER RESET 0x0000 MVME2502 Installation and Use (6806800R96G)

  • Page 115: Boot System

    The value relocaddr indicates the location of U-boot in DRAM. The MVME2502 uses Das U-Boot, a boot loader software based on the GNU Public License. It boots the blade and is the first software to be executed after the system is powered on.

  • Page 116: Boot Options

    1. Make sure that the kernel, dtb, and ramdisk are accessible to the board from the TFTP server. 2. Configure U-Boot environment variables: setenv ipaddr <IP address of MVME2502> setenv serverip <IP address of TFTP server> setenv gatewayip <gateway IP>...

  • Page 117: Booting From An Optional Sata Drive

    # option: usb - interface, 0:1 - device 0 partition 1 fatload usb 0:1 1000000 $File_uImage fatload usb 0:1 2000000 $File_ramdisk fatload usb 0:1 c00000 $File_dtb 5. Boot the Linux in memory: bootm 1000000 2000000 c00000 MVME2502 Installation and Use (6806800R96G)

  • Page 118: Booting From An Sd Card

    In this mode, the U-Boot downloads and boots VxWorks from an external TFTP server. 1. Make sure that the VxWorks image is accessible to the board from the TFTP server. 2. Configure U-Boot environment variables: setenv ipaddr <IP address of MVME2502> setenv serverip <IP address of TFTP server> setenv gatewayip <gateway IP>...

  • Page 119: Using The Persistent Memory Feature

    U-Boot reports less memory to the Linux kernel through the mem parameter, indicating that the operating system should not use it either. MVME2502 Installation and Use (6806800R96G)

  • Page 120: Mvme2502 Specific U-Boot Commands

    Load binary file from a Ext2 file system ext2load List files in a directory (default /) ext2ls Print information about file system fatinfo Load binary file from a DOS file system fatload List files in a directory (default /) fatls MVME2502 Installation and Use (6806800R96G)
  • Page 121 Boot System Table 6-1 MVME2502 Specific U-Boot Commands (continued) Command Description Flattened device tree utility commands Start application at address addr Print online help help C sub-system Print header information for application image iminfo Extract a part of a multi-image...
  • Page 122 Boot System Boot System Table 6-1 MVME2502 Specific U-Boot Commands (continued) Command Description List and access PCI Configuration Space Show information about devices on PCI bus pci_info Send ICMP ECHO_REQUEST to network host ping Print environment variables printenv Boot image through network using RARP/TFTP protocol...

  • Page 123: Updating U-Boot

    5. Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0: sf write 0x1000000 0 0x90000 To replace the image in SPI bank 1, replace step 3 with "Select SPI flash # 1:" sf probe 1 MVME2502 Installation and Use (6806800R96G)
  • Page 124 Boot System Boot System MVME2502 Installation and Use (6806800R96G)

  • Page 125: Programming Model

    Overview This chapter includes additional programming information for the MVME2502. Reset Configuration The MVME2502 supports the power-on reset (POR) pin sampling method for processor reset configuration. Each option and the corresponding default setting are described in the following table. Table 7-1...
  • Page 126 CFG_CORE0_SPEED For 800MHz board :0=CORE configuration FREQ<=1000 MHz CFG_CORE1_SPEED CORE 1 For 1200MHz board LA26 :1=CORE Speed configuration FREQ>=1000 MHz CFG_CORE1_SPEED For 800MHz board :0=CORE configuration FREQ<=1000 MHz CFG_DDR_SPEED:1= Controller LA26 DDR FREQ>= 500 Speed MVME2502 Installation and Use (6806800R96G)
  • Page 127 Width RGMI, RMII or 8-bit FIFO mode). The eTSEC2 controller operates using the GMII protocol (or ETSEC1 TSEC1_TXD0, RGMII, if configured in Protocol TSEC1_TXD7 reduced mode) if its not configured to operate in SGMII mode. MVME2502 Installation and Use (6806800R96G)
  • Page 128 (default) TYPE Disable PLL lock time- out counter. The SerDes PLL power-on-reset Time Out TRIG_OUT sequence waits Enable indefinitely for the SerDes PLL to lock (default). System SYSCLOCK is above LA[28] Speed 66 MHz MVME2502 Installation and Use (6806800R96G)

  • Page 129: Interrupt Controller

    RapidIO is not used System Size Interrupt Controller The MVME2502 uses the MPC8548E integrated programmable interrupt controller (PIC) to manage locally generated interrupts. Currently defined external interrupting devices, interrupt assignments, along with corresponding edge/levels, and polarities are shown in the following table.

  • Page 130: I 2 C Bus Device Addressing

    (Schematic) IRQ11// GPIO4 QUART_IRQ0 RTB Quart Interrupt C Bus Device Addressing The following table contains the I C devices used for the MVME2502 and its assigned device address. Table 7-3 C Bus Device Addressing C Bus Address Device Function Size...

  • Page 131: Ethernet Phy Address

    7.6.3 Quad UART The MVME2502 console RS-232 port is driven by the UART built into the P2020 QorIQ chip. Additionally, the MVME2502 has a Quad UART chip which provides four 16550 compatible UARTs. These additional UARTs are internally accessed through the LBC bus.

  • Page 132: Lbc Timing Parameters

    External address termination 0 - Access is terminated internally by the memory controller unless the external device asserts LGTA earlier to terminate the access. TRLX Timing Relaxed 0 - Normal timing is generated by the GPCM. MVME2502 Installation and Use (6806800R96G)

  • Page 133: Clock Distribution

    P2020 clocks are generated by ICS840S07I device. Additional clocks required by individual devices are generated near the devices using individual oscillators. The following table lists the clocks required on the MVME2502 along with the frequency and source. Table 7-6 Clock Distribution...

  • Page 134: System Clock

    7.7.3 Local Bus Controller Clock Divisor The local bus controller (LBC) clock output is connected to the CPLD for LBC bus transaction. It is also the source of 1 MHz (CPU_RTC) and CPLD tick timers. MVME2502 Installation and Use (6806800R96G)

  • Page 135: Replacing The Battery

    Appendix A Replacing the Battery Replacing the Battery The figure below shows the location of the board battery. Figure A-1 Battery Location ENP1 Variant MVME2502 Installation and Use (6806800R96G)

  • Page 136: Figure A-2 Battery Location Enp2 Variant

    Replacing the Battery Replacing the Battery Figure A-2 Battery Location ENP2 Variant MVME2502 Installation and Use (6806800R96G)
  • Page 137 1. For ET product, remove heat frame. 2. Remove the old battery. 3. Install the new battery with the plus sign (+) facing up. 4. Dispose of the old battery according to your country’s legislation and in an environmentally safe way. MVME2502 Installation and Use (6806800R96G)
  • Page 138 Replacing the Battery Replacing the Battery MVME2502 Installation and Use (6806800R96G)

  • Page 139: Related Documentation

    Table B-2 Manufacturers’ Publications Company Document NXP Corporation, QorIQ™ P2020 Integrated Processor Reference Manual, Rev. 0 Integrated Device Tsi148™ PCI/X-to-VME Bus Bridge User Manual, March 2009 Technology MVME2502 Installation and Use (6806800R96G)

  • Page 140: Related Specifications

    PCI Local Bus Specification PCI Rev 3.0 Component Interconnect Special PCI-X Electrical and Mechanical Addendum to the PCI Local Bus Interest Group Specification (PCI-X EM) Revision 2.0a (PCI-SIG) PCI-X Protocol Addendum to the PCI Local Bus Specification (PCI-X PT) Revision 2.0a MVME2502 Installation and Use (6806800R96G)
  • Page 141 Serial ATA II: Extensions to Serial ATA 1.0 Revision 1.0 (SATA-IO) Trusted Computing TPM Specification 1.2, Level 2 Revision 103 Version 1.2 Group (TCG) USB Implementers Universal Serial Bus Specification (USB) Revision 2.0 Forum (USB-IF) MVME2502 Installation and Use (6806800R96G)
  • Page 142 Related Documentation Related Documentation MVME2502 Installation and Use (6806800R96G)
  • Page 144 © 2019 SMART Embedded Computing™, Inc. All rights reserved. The stylized “S” and “SMART” is a registered trademark of SMART Modular Technologies, Inc. and “SMART Embedded Computing” and the SMART Embedded Computing logo are trademarks of SMART Modular Technologies, Inc. All other names and logos...

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