Table 7-1
CONFIG
Engineering
16
use
SerDes Ref
17
Clock Config
ETSEC2
18
SGMII Mode
ETSEC3
19
SGMMI
Mode
ETSEC1
and
20
ETSEC2
Width
ETSEC1
21
Protocol
MVME2502 Installation and Use (6806800R96L)
POR Configuration Settings (continued)
CONFIG PINS
LA[22:20]
UART_SOUT[0],
TRIG_OUT,
MSRCID[1],
MSRCID[4],
DMA1_DDONE_B[0]
TSEC_1588_ALAR
M_OUT1
LGPL1
TSEC_1588_ALAR
M_OUT2
EC_MDC
TSEC1_TXD0,
TSEC1_TXD7
CONFIG SELECTION
11111111
Default (for future use)
SerDes expects 100
1
MHz reference clock
frequency (default).
eTSEC2 Ethernet
interface operates in
standard parallel
1
interface mode and
uses the TSEC_2'pins
(default).
eTSEC3 Ethernet
interface operates in
standard parallel
1
interface mode and
uses the TSEC_3'pins
(default).
eTSEC1 and eTSEC2
Ethernet interfaces
operate in reduced pin
0
mode (either RTBI,
RGMI, RMII or 8-bit
FIFO mode).
The eTSEC2 controller
operates using the
GMII protocol (or
10
RGMII, if configured in
reduced mode) if its not
configured to operate
in SGMII mode.
Programming Model
REMARKS
131
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