Pld Test Register 1; Table 5-16 Pld Test Register 1 - SMART Embedded Computing Penguin Edge MVME250 Series Installation And User Manual

Memory Maps and Registers
When SERIAL_FLASH_WP is set to LOW, this port will automatically read as low due
to AND connection between the two ports.
5.5.13

PLD Test Register 1

The MVME2502 PLD provides an 8-bit general purpose read/write register which is used
by the software for PLD testing or general status bit storage.

Table 5-16 PLD Test Register 1

REG
Bit
Field
OPER
RESET
Field Description
TEST_REG1
108
PLD Write Protect I2C Debug- 0xFFDF0095
7 6 5
TEST_REG1
R/W
00
General purpose 8-bit R/W field
4 3 2
MVME2502 Installation and Use (6806800R96L)
Memory Maps and Registers
1 0