Ethernet Phy Address; Other Software Considerations; Mram; Real Time Clock - SMART Embedded Computing Penguin Edge MVME250 Series Installation And User Manual

7.5

Ethernet PHY Address

The assigned Ethernet PHY on the MII management bus is shown in the following table.
Table 7-4
Ethernet
Port
TSEC1
TSEC2
TSEC3
7.6

Other Software Considerations

The following sections provide programming information in relation to various board
components:
7.6.1

MRAM

The MVME2502 provides 512K bytes of fast, non-volatile storage in the form of
Magnetoresistive Random Access Memory (MRAM). The MRAM is directly accessible by
software using processor load and store instructions similar to the DRAM. The difference
is that the MRAM retains its contents even if the board is power cycled. The MRAM is
accessed through the LBC.
7.6.2

Real Time Clock

The MVME2502 provides a battery backup DS1375 Real Time Clock (RTC) chip. The RTC
chip provides time keeping and alarm interrupts. It is an I
2
the I C bus address at 0x68.
7.6.3

Quad UART

The MVME2502 console RS-232 port is driven by the UART built into the P2020 QorIQ
chip. Additionally, the MVME2502 has a Quad UART chip which provides four 16550
compatible UARTs. These additional UARTs are internally accessed through the LBC bus.
The Quad UART chip clock input (which is internally divided to generate the baud rate) is
1.8432MHz. The four UARTs physically connect to RS-232 DB9 serial ports through the
RTM.
MVME2502 Installation and Use (6806800R96L)
PHY Types and MII Management Bus Address
Function / Location
Gigabit Ethernet port routed to front panel or back
panel, set by GBE_MUX_SEL in S2.
Gigabit Ethernet port routed to front panel
Gigabit Ethernet port routed to back panel
Programming Model
PHY Types
BCM54616
BCM54616
BCM54616
2
C device and is accessed through
PHY MIIM
Address
1
2
7
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