Part 7.4: Expansion Port J10 - Alinx ZYNQ7000 FPGA User Manual

Figure 7-8: Real time clock DS1302 on the FPGA Board
Real Time Clock DSR1302 Pin Assignment
Signal Name
RTC _SCLK
RTC_RESET
RTC _DATA

Part 7.4: Expansion Port J10

The expansion port J10 is a 40-pin 2.54mm double-row connector, which
expands more peripherals and interfaces for users. Currently, the modules
provided by ALINX include: ADDA module, LCD module, Gigabit Ethernet
module, audio input/output module, matrix keyboard module, 500W binocular
vision camera module, etc. The expansion port has 40 signals, of which
1-channel 5V power supply, 2-channel 3.3 V power supply, 3-channle ground
and 34 IOs. The 34 IOs are connected to the BANK34 and BANK35 of ZYNQ
PL. The default level is 3.3V. Parts of the 34IOs of the expansion port J10 can
change the level by replacing the power chip (SPX3819M5-3-3) on the
development board.
Do not directly connect the IO directly to the 5V device to avoid
40 / 48
ZYNQ FPGA Development Board AX7010 User Manual
ZYNQ Pin Name
IO_0_34
IO_L22N_T3_AD7N_35
IO_L22P_T3_AD7P_35
Amazon Store: https://www.amazon.com/alinx
ZYNQ Pin Number
R19
L15
L14
Description
RTC Clock Signal
RTC Reset Signal
RTC Data Signal