Alinx ZYNQ7000 FPGA User Manual page 13

 2 SPIs, 2 UARTs, 2 I2C interfaces
 4 sets of 32bit GPIO, 54 (32+22) as PS system IO, 64 connected to PL
 High bandwidth connection within PS and PS to PL
The main parameters of the PL logic part are as follows:
 Logic Cells: 28K
 Look-up-tables (LUTs): 17600
 Flip-flops: 35200
 18x25MACCs：80
 Block RAM：240KB
 Two AD converters for on-chip voltage, temperature sensing and up
to 17 external differential input channels, 1MBPS
XC7Z010-1CLG400C chip speed grade is -1, commercial grade, package
is BGA, pin pitch is 0.8mm the specific chip model definition of ZYNQ7000
series is shown in Figure 4-2
Figure 4-2: The Specific Chip Model Definition of ZYNQ7000 Series
The chip of the BGA package, the pin name is in the form of letters +
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ZYNQ FPGA Development Board AX7010 User Manual
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