Part 6：Zynq Processor System (Ps) Peripherals; Part 6.1: Qspi Flash - Alinx ZYNQ7000 FPGA User Manual

Figure 5-4: 50Mhz active crystal oscillator on the FPGA board
PL Clock pin assignment:
Part 6：ZYNQ Processor System (PS) peripherals
ZYNQ is composed of the PS part of the ARM system and the PL part of
the FPGA logic. Some peripherals on the development board are connected to
the IO of the PS, and some peripherals are connected to the IO of the PL. First
introduce the peripherals connected to the PS part.

Part 6.1: QSPI Flash

The AX7010 FPGA development board is equipped with a 256MBit
19 / 48
ZYNQ FPGA Development Board AX7010 User Manual
Figure 5-3: PL system clock source
Signal Name
PL_GCLK
Amazon Store: https://www.amazon.com/alinx
ZYNQ Pin
U18