Part 3.10: Jtag Interface - Alinx AX7050 User Manual

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Part 3.10: JTAG Interface

A standard 10-pin 2.54mm pitch JTAG interface is reserved on the AX7050
FPGA Carrier Board for downloading FPGA programs or firmware to FLASH. In
order to prevent damage to the FPGA chip caused by hot plugging, a protection
diode is added to the JTAG signal to ensure that the voltage of the signal is
within the range accepted by the FPGA to avoid damage of the FPGA chip.
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Spartan-7 FPGA Development Board AX7050 User Manual
P21
N20
AA22
Y22
AB21
AA20
GND
+3.3V
Figure 3-10-1: JTAG Interface Schematic
Amazon Store: https://www.amazon.com/alinx
T22
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P22
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P20
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AB21
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Y20
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W18
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GND
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+3.3V
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