Alinx AX7050 User Manual page 38

Spartan-7 FPGA Development Board AX7050 User Manual
Figure 3-4-2: USB 2.0 part on the Carrier Board
USB 2.0 Pin Assignment
Signal Name
USB_FD0
USB_FD1
USB_FD2
USB_FD3
USB_FD4
USB_FD5
USB_FD6
USB_FD7
USB_RXF
USB_TXE
USB_RD
USB_WR
USB_SIWUA
USB_CLKOUT
USB_OE
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FPGA PIN
F15
F13
F14
G13
A14
B14
C13
D13
D14 Low indicates that the receive FIFO data is readable
D15 Low indicates that the send FIFO data can be written
D12
C12 Data transmission FIFO write signal, low active
E12
B15
F12
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Description
USB2.0 data Bit0
USB2.0 data Bit1
USB2.0 data Bit2
USB2.0 data Bit3
USB2.0 data Bit4
USB2.0 data Bit5
USB2.0 data Bit6
USB2.0 data Bit7
Data receive FIFO read signal, low active
Send immediately/wake up function
60MHz Clock Output
USB data output enable