Alinx AX7050 User Manual page 17

DDR3 DRAM pin assignment:
Net Name
DDR3_DQS0_P
DDR3_DQS0_N
DDR3_DQS1_P
DDR3_DQS1_N
DDR3_DQS2_P
DDR3_DQS2_N
DDR3_DQS3_P
DDR3_DQS3_N
DDR3_DQ[0]
DDR3_DQ [1]
DDR3_DQ [2]
DDR3_DQ [3]
DDR3_DQ [4]
DDR3_DQ [5]
DDR3_DQ [6]
DDR3_DQ [7]
DDR3_DQ [8]
DDR3_DQ [9]
DDR3_DQ [10]
DDR3_DQ [11]
DDR3_DQ [12]
DDR3_DQ [13]
DDR3_DQ [14]
DDR3_DQ [15]
DDR3_DQ [16]
DDR3_DQ [17]
DDR3_DQ [18]
DDR3_DQ [19]
DDR3_DQ [20]
DDR3_DQ [21]
DDR3_DQ [22]
DDR3_DQ [23]
DDR3_DQ [24]
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Spartan-7 FPGA Development Board AX7050 User Manual
IO_L3P_T0_DQS_AD5P_35
IO_L9P_T1_DQS_AD7P_35
IO_L9N_T1_DQS_AD7N_35
IO_L5P_T0_AD13P_35
IO_L5N_T0_AD13N_35
IO_L2P_T0_AD12P_35
IO_L12P_T1_MRCC_35
IO_L11P_T1_SRCC_35
IO_L8N_T1_AD14N_35
IO_L10N_T1_AD15N_35
IO_L11N_T1_SRCC_35
IO_L10P_T1_AD15P_35
IO_L14P_T2_SRCC_35
IO_L14N_T2_SRCC_35
IO_L13N_T2_MRCC_35
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FPGA PIN Name
IO_L2N_T0_AD12N_35
IO_L15P_T2_DQS_35
IO_L15N_T2_DQS_35
IO_L21P_T3_DQS_35
IO_L21N_T3_DQS_35
IO_L1N_T0_AD4N_35
IO_L4N_T0_35
IO_L2N_T0_AD12N_35
IO_L6P_T0_35
IO_L1P_T0_AD4P_35
IO_L7P_T1_AD6P_35
IO_L7N_T1_AD6N_35
IO_L18P_T2_35
IO_L16P_T2_35
IO_L17N_T2_35
IO_L17P_T2_35
IO_L16N_T2_35
IO_L24N_T3_35
FPGA P/N
J2
J1
L5
K5
M2
M1
P6
N6
H2
K2
H3
H6
H5
K6
H4
J3
M8
L8
L6
J8
K4
K8
L4
J7
L1
P3
K1
N4
N1
P1
M3
N3
R4