Part 2.3: Active Differential Crystal - Alinx AX7050 User Manual

The main parameters of the FPGA chip XC7S50 are as follows
FPGA power supply system
XILINX Spartan7 FPGA power supplies are V
V is the FPGA core power supply pin, which needs to be connected to 1.0V;
CCINT
V is the power supply pin of FPGA block RAM, connect to 1.0V; V
CCBRAM
FPGA auxiliary power supply pin, connect 1.8V; V
BANK of FPGA, including BANK0, BANK14, BANK15~16, BANK34~35. On
AC7050 FPGA core board, BANK34 and BANK35 need to be connected to
DDR3, the voltage connection of BANK is 1.5V, and the voltage of other BANK
is 3.3V. The VCCO of BANK15 and BANK16 is powered by the LDO, and can
be changed by replacing the LDO chip.

Part 2.3: Active Differential Crystal

The AC7050 core board is equipped with a 50Mhz active differential
crystal for the system's main clock of the FPGA. The crystal output is
connected to the clock input pin of the FPGA (IO_L13P_T2_MRCC_14, Pin
P15). This clock can be used to drive the user logic in the FPGA. Users can
configure the FPGA's internal PLLs to achieve a higher clock.
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Spartan-7 FPGA Development Board AX7050 User Manual
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, V , V
CCINT CCBRAM CCAUX
is the voltage of each
CCO
, V .
CCIO
is
CCAUX