Part 2.5: Qspi Flash - Alinx AX7050 User Manual

DDR3_CLK_N
DDR3_CKE

Part 2.5: QSPI Flash

The FPGA core board AC7050 is equipped with one 128MBit QSPI
FLASH, and the model is N25Q128, which uses the 3.3V CMOS voltage
standard. Due to the non-volatile nature of QSPI FLASH, it can be used as a
boot device for the system to store the boot image of the system. These
images mainly include FPGA bit files, ARM application code, core application
code and other user data files. The specific models and related parameters of
QSPI FLASH are shown in Table 2-5-1.
Position
U8
QSPI FLASH is connected to the dedicated pins of BANK0 and BANK14 of
the FPGA chip. The clock pin is connected to CCLK0 of BANK0, and other data
and chip select signals are connected to D00~D03 and FCS pins of BANK14
respectively. Figure 2-5-1 shows the hardware connection of QSPI Flash.
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Spartan-7 FPGA Development Board AX7050 User Manual
IO_L12N_T1_MRCC_34
Model
N25Q128
Table 2-5-1: QSPI FLASH Specification
Figure 2-5-1: QSPI Flash Schematic
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IO_L3N_T0_DQS_34
Capacity
128M Bit
T2
V4
Factory
Numonyx