Table of Contents
Advertisement
7.2 8-Bit Timer/Event Counter Configurations
8-bit timer/event counter consists of the following hardware.
Timer register
Register
Timer output
Control register
Note See Block Diagram of Figure 4-3 P20 to P27.
Remark n = 0, 1
(1) 8-bit counter 5n (TM5n: n = 0,1)
TM5n is an 8-bit read-only register which counts the count pulses.
When count clock starts, a counter is incremented. TM50 and TM51 can be connected in cascade and used
as a 16-bit timer.
When TM50 and TM51 can be connected in cascade and used as a 16-bit timer, they can be read by a 16-bit
memory operation instruction. However, since they are connected by an internal 8-bit bus, TM50 and TM51 are
read separately in two times. Thus, take read during count change into consideration and compare them in two
times reading. When count value is read during operation, count clock input is temporary stopped, and then the
count value is read. In the following situations, count value is set to 00H.
<1> RESET input
<2> When TCE5n is cleared
<3> When TM5n and CR5n match in clear & start mode if this mode was entered upon match of TM5n and CR5n
values.
Caution
In cascade connection mode, the count value is reset to 00H when the lowest timer TCE5n
is cleared.
Remark n = 0, 1
(2) 8-bit compare register 5n (CR5n: n = 0, 1)
When CR5n is used as a compare resistor, the value set in CR5n is constantly compared with the 8-bit counter
(TM5n) count value, and an interrupt request (INTTM5n) is generated if they match. (Except PWM mode).
It is possible to rewrite the value of CR5n within 00H to FFH during count operation.
When TM50 and TM51 can be connected in cascade and used as a 16-bit timer, CR50 and CR51 operate as
the 16-bit compare register. It compares count value with register value, and if the values are matched, interrupt
request (INTTM50) are generated. INTTM51 interrupt request is also generated at this time. Thus, when TM50
and TM51 are used as cascade connection, mask INTTM51 interrupt request.
Caution
In cascade connection mode, stop the timer operation before setting the data.
Remark n = 0, 1
CHAPTER 7 8-BIT TIMER/EVENT COUNTER
Table 7-1. 8-Bit Timer/Event Counter Configurations
Item
8-bit counter 5n (TM5n)
8-bit compare register 5n (CR5n)
2 (TO5n)
Timer clock select register 5n (TCL5n)
8-bit timer mode control register 5n (TMC5n)
Port mode register 2 (PM2)
Preliminary User's Manual U13420EJ2V0UM00
Configuration
Note
137
Advertisement
Table of Contents
