Caution
Since RESET input makes SP contents undefined, be sure to initialize the SP before instruction
execution.
PUSH rp Instruction
SP _ 2
SP
SP _ 2
Register pair lower
SP _ 1
Register pair upper
SP
POP rp Instruction
SP
Register pair lower
Register pair upper
SP + 1
SP
SP + 2
52
CHAPTER 3 CPU ARCHITECTURE
Figure 3-8. Data to be Saved to Stack Memory
CALL, CALLF, and
CALLT Instructions
SP _ 2
SP
SP _ 2
SP _ 1
SP
Figure 3-9. Data to be Restored from Stack Memory
SP
SP + 1
SP
SP + 2
Preliminary User's Manual U13420EJ2V0UM00
SP _ 3
SP
SP _ 3
SP _ 2
PC7 to PC0
SP _ 1
PC15 to PC8
SP
RET Instruction
SP
PC7 to PC0
SP + 1
PC15 to PC8
SP + 2
SP
SP + 3
Interrupt and
BRK Instructions
PC7 to PC0
PC15 to PC8
PSW
RETI and RETB
Instructions
PC7 to PC0
PC15 to PC8
PSW