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(3) Oscillation Stabilization Time Select Register (OSTS)
A register to select oscillation stabilization time from reset time or STOP mode released time to the time when
oscillation is stabilized.
OSTS is set by an 8-bit memory operation instruction.
By RESET input, it is turned into 04H. Thus, when releasing the STOP mode by RESET input, the time required
17
to release is 2
/fx.
Figure 9-4. Format of Oscillation Stabilization Time Select Register (OSTS)
Address: FFFAH
After reset: 04H
Symbol
7
OSTS
0
OSTS2
0
0
0
0
1
Other than above
Remarks 1. f
: Main system clock oscillation frequency
X
2. Figures in parentheses are for operation with f
166
CHAPTER 9 WATCHDOG TIMER
R/W
6
5
4
0
0
0
OSTS1
OSTS0
12
0
0
2
/f
X
14
0
1
2
/f
X
15
1
0
2
/f
X
16
1
1
2
/f
X
17
0
0
2
/f
X
Setting prohibited
Preliminary User's Manual U13420EJ2V0UM00
3
2
0
OSTS2
Selection of oscillation stabilization time
(488 µ s)
(1.95 ms)
(3.91 ms)
(7.81 ms)
(15.6 ms)
= 8.38 MHz
X
1
0
OSTS1
OSTS0
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