NEC mPD780065 Series Preliminary User's Manual page 235

8-bit single-chip microcontrollers
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(b) Basic transmit mode
In this mode, the specified number of 8-bit unit data are transmitted.
Serial transfer is started when any data is written to the serial I/O shift register 1 (SIO1) while bit 7 (CSIE10)
of the serial operating mode register 1 (CSIM1) is set to 1, and bit 7 (RE0) of the automatic data transmit/
receive control register (ADTC0) is set to 0.
Upon completion of transmission of the last byte, the interrupt request flag (CSIIF1) is set. The termination
of automatic transmission/reception should be checked by using bit 3 (TRF0) of the automatic data
transmit/receive control register (ADTC0), not by CSIIF1.
If receive operation, busy control and strobe control are not executed, the P84/SI1, P81/BUSY, and P80/
STB pins can be used as normal input ports.
Figure 14-10 shows the basic transmit mode operation timings, and Figure 14-11 shows the operation
flowchart.
Figure 14-12 shows buffer RAM operation in 6-byte repeat transmission.
Figure 14-10. Basic Transmit Mode Operation Timings
SCK1
SO1
D7 D6 D5 D4 D3 D2 D1 D0
CSIIF1
TRF0
Cautions
1. Because, in the basic transmit mode, the automatic transmit/receive function reads
data from the buffer RAM after 1-byte transmission, an interval is inserted till the
next transmission. As the buffer RAM read is performed at the same time as CPU
processing, the maximum interval is dependent upon CPU processing and the
value of the automatic data transmit/receive interval specification register (ADTI0)
(refer to 14.4.3 (6) Automatic data transmit/receive interval).
2. When TRF0 is cleared, the SO1 pin becomes low level.
Remark CSIIF1: Interrupt request flag
TRF0 : Bit 3 of automatic data transmit/receive control register (ADTC0)
CHAPTER 14 SERIAL INTERFACE (SIO1)
Interval
D7 D6 D5 D4 D3 D2 D1 D0
Preliminary User's Manual U13420EJ2V0UM00
235

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