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(4) Prescaler mode register 0 (PRM0)
This register is used to set 16-bit timer/counter 0 (TM0) count clock and TI00, TI01 input valid edges.
PRM0 is set with an 8-bit memory manipulation instruction.
RESET input sets PRM0 value to 00H.
Figure 6-5. Format of Prescaler Mode Register 0 (PRM0)
Address: FF61H
After reset: 00H
Symbol
7
PRM0
ES11
ES11
0
0
1
1
ES01
0
0
1
1
PRM01
0
0
1
1
Note The external clock needs a pulse more than twice the length of the internal clock (f
Cautions 1. If the valid edge of TI00 is to be set to the count clock, do not set the clear/start mode and
the capture trigger at the valid edge of TI00.
Moreover, do not use the P20/TI00/TO0 pins as timer outputs (TO0).
2. Always set data to PRM0 after stopping the timer operation.
3. To secure capture of the capture trigger, a pulse more than twice the length of the count
clock to be selected is required. When TI00 is high level just after system reset, the falling
edge is detected just after the TM0 operation is permitted. Be aware of this if using a pull-
up resistor.
Remarks 1. f
: Main system clock oscillation frequency
X
2. TI00, TI01: 16-bit timer/event counter input pin
3. Figures in parentheses are for operation with f
112
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
R/W
6
5
4
ES10
ES01
ES00
ES10
0
Falling edge
1
Rising edge
0
Setting prohibited
1
Both falling and rising edges
ES00
0
Falling edge
1
Rising edge
0
Setting prohibited
1
Both falling and rising edges
PRM00
0
f
(8.38 MHz)
X
2
1
f
/2
(2.09 MHz)
X
6
0
f
/2
(131 kHz)
X
Note
1
TI00 valid edge
Preliminary User's Manual U13420EJ2V0UM00
3
2
0
0
PRM01
TI01 valid edge selection
TI00 valid edge selection
Count clock selection
= 8.38 MHz.
X
1
0
PRM00
3
/2
).
X
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