NEC mPD780065 Series Preliminary User's Manual page 303

Note 1
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM Data memory
General register
Port (Output latch) Ports 1 to 3, 7 to 9 (P1 to P3, P7 to P9)
Ports 4 to 6 (P4 to P6)
Port mode registers (PM0, PM2 to PM9)
Pull-up resistor option registers (PU0, PU2 to PU9)
Processor clock control register (PCC)
Memory size switching register (IMS)
Internal expansion RAM size switching register (IXS)
Memory expansion mode register (MEM)
Memory expansion wait setting register (MM)
Oscillation stabilization time selection register (OSTS)
16-bit timer/event Timer register (TM0)
counter
Capture/compare register (CR00, CR01)
Prescaler mode register (PRM0)
Mode control register (TMC0)
Output control register (TOC0)
8-bit timer/event counter Timer counters (TM50, TM51)
Compare registers (CR50, CR51)
Clock selection registers (TCL50, TCL51)
Mode control register (TMC50, TMC51)
Watch timer Mode control register (WTM)
Watchdog timer Clock selection register (WDCS)
Mode register (WDTM)
Notes 1. During reset input or oscillation stabilization time wait, only the PC contents among the hardware
statuses becomes undefined. All other hardware statuses remain unchanged after reset.
2. When a reset is executed in the standby mode, the pre-reset status is held even after reset.
3. Although the initial value is CFH, use the following value to be set for each version.
µ PD780065: CAH
µ PD78F0066: CCH or value for mask ROM versions
4. Although the initial value is 0CH, always set 04H.
CHAPTER 20 RESET FUNCTION
Table 20-1. Hardware Statuses after Reset (1/2)
Hardware
Preliminary User's Manual U13420EJ2V0UM00
Status After Reset
Contents of reset vector table
(0000H, 0001H) are set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H
Undefined
FFH
00H
04H
Note 3
CFH
Note 4
0CH
00H
10H
04H
0000H
Undefined
00H
00H
00H
00H
Undefined
00H
04H
00H
00H
00H
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