Data Memory Addressing - NEC mPD780065 Series Preliminary User's Manual

3.1.5 Data memory addressing

Addressing refers to the method of specifying the address of the instruction to be executed next or the address
of the register or memory relevant to the execution of instructions.
The address of an instruction to be executed next is addressed by the program counter (PC) (for details, see 3.3
Instruction Address Addressing).
Several addressing modes are provided for addressing the memory relevant to the execution of instructions for
the µ PD780065 Subseries, based on operability and other considerations. For areas containing data memory in
particular, special addressing methods designed for the functions of special function registers (SFR) and general-
purpose registers are available for use. Data memory addressing is illustrated in Figures 3-3 and 3-4. For the details
of each addressing mode, see 3.4 Operand Address Addressing.
FFFFH
Special function
registers (SFRs)
FF20H
FF1FH
FF00H
FEFFH
General registers
32 × 8 bits
FEE0H
FEDFH
Internal high-speed RAM
1024 × 8 bits
FE20H
FE1FH
FB00H
FAFFH
FAE0H
FADFH
Internal buffer RAM
FAC0H
FABFH
F800H
F7FFH
Internal expansion RAM
4096 × 8 bits
E800H
E7FFH
External memory
18432 × 8 bits
A000H
9FFFH
Internal ROM
40960 × 8 bits
0000H
48
CHAPTER 3 CPU ARCHITECTURE
Figure 3-3. Data Memory Addressing ( µ PD780065)
SFR addressing
256 × 8 bits
Register addressing
Reserved
32 × 8 bits
Reserved
Preliminary User's Manual U13420EJ2V0UM00
Short direct
addressing
Direct addressing
Register indirect
addressing
Based addressing
Based indexed
addressing