NEC mPD780065 Series Preliminary User's Manual page 300

8-bit single-chip microcontrollers
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(b) Release by RESET input
The STOP mode is cleared when RESET signal is input, and after the lapse of oscillation stabilization time,
reset operation is carried out.
STOP instruction
RESET
signal
Operating mode
Oscillation
Clock
Remarks 1. f
: Main system clock oscillation frequency
X
2. Values in parentheses are for operation with f
Release Source
Maskable interrupt request
RESET input
×: don't care
300
CHAPTER 19 STANDBY FUNCTION
Figure 19-5. STOP Mode Release by RESET Input
STOP mode
Oscillation stop
Table 19-4. Operation after STOP Mode Release
MK××
PR××
0
0
0
0
0
1
0
1
0
1
×
1
Preliminary User's Manual U13420EJ2V0UM00
Wait
17
(2
/f
: 15.6 ms)
X
Reset
Oscillation stabilization
period
wait status
Oscillation
= 8.38 MHz.
X
IE
ISP
×
0
Next address instruction execution
×
1
Interrupt service execution
0
1
Next address instruction execution
×
0
1
1
Interrupt service execution
×
×
STOP mode hold
×
×
Reset processing
Operating mode
Operation

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