8-Bit Timer/Event Counters 2 And 3 Configurations - NEC mPD780973 Series Preliminary User's Manual

CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 2, 3 TM2, TM3

9.2 8-Bit Timer/Event Counters 2 and 3 Configurations

Timers 2 and 3 consist of the following hardware.
Timer register
Register
Timer output
Control register
Remark n = 2, 3
(1) 8-bit counter n (TMn: n = 2, 3)
TMn is an 8-bit read-only register which counts the count pulses.
The counter is incremented in synchronization with the rising edge of the count clock. When count value is read
during operation, count clock input is temporary stopped, and then the count value is read. In the following
situations, the count value is set to 00H.
<1> RESET input
<2> Clear TCEn
<3> Match between TMn and CRn in clear and start made with match between TMn and CRn
Remark n = 2, 3
(2) 8-bit compare register n (CRn: n = 2, 3)
The value set in the CRn is constantly compared with the 8-bit counter n (TMn) count value, and an interrupt
request (INTTMn) is generated if they match (except PWM mode).
It is possible to rewrite the value of CRn within 00H to FFH during count operation.
Remark n = 2, 3
Table 9-1. Timers 2 and 3 Configurations
Item
8-bit counter n (TMn)
8-bit compare register n (CRn)
2 (TIOn)
Timer clock select register n (TCLn)
8-bit timer mode control register n (TMCn)
Configuration
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