Translation Table Structure; Logical Address Format - Motorola M68060 User Manual

Memory Management Unit
ROOT POINTER
descriptor, can be used when two or more logical addresses access a single page descrip-
tor.
The table search uses logical addresses to access the translation tables. Figure 4-7 illus-
trates a logical address format, which is segmented into four fields: root index (RI), pointer
index (PI), page index (PGI), and page offset. The first three fields extracted from the logical
address index the base address for each table level. The seven bits of the logical address
RI field are multiplied by 4 or shifted to the left by two bits. This sum is concatenated with
the upper 23 bits of the appropriate root pointer (URP or SRP) to yield the physical address
of a root-level table descriptor. Each of the 128 root-level table descriptors corresponds to
a 32-Mbyte block of memory and points to the base of a pointer-level table.
31
7 BITS
ROOT INDEX FIELD
(RI)
The seven bits of a logical address PI field are multiplied by 4 (shifted to the left by two bits)
and concatenated with the fetched root-level descriptor's upper 23 bits to produce the phys-
ical address of the pointer-level table descriptor. Each of the 128 pointer-level table descrip-
tors corresponds to a 256-Kbyte block of memory.
4-8
Figure 4-6. Translation Table Structure
25 24 18 17
7 BITS
POINTER INDEX FIELD
(PI)
Figure 4-7. Logical Address Format
M68060 USER'S MANUAL
13 12 11
8K PAGE
4K PAGE
PAGE INDEX FIELD
(PGI)
FIRST
ROOT
LEVEL
TABLES
POINTER
SECOND
TABLES
LEVEL
THIRD
PAGE
LEVEL TABLES
13 BITS - 8K PAGE
12 BITS - 4K PAGE
PAGE OFFSET
MOTOROLA
0