Exiting Lpstop Mode Flowchart - Motorola M68060 User Manual

Bus Operation
Figure 7-35 illustrates a flowchart for exiting the LPSTOP mode, and Figure 7-36 illustrates
the bus activity when exiting the LPSTOP mode, assuming that an interrupt is used to
awaken the processor and that the bus is initially three-stated.
1) PERFORM INTERNAL WAKE-UP
2) BEGIN EXCEPTION PROCESSING
3) DRIVE PST4–PST0 = $18 (EXCEPTION
PROCESSING)
RESET
1) PERFORM INTERRUPT
ACKNOWLEDGE CYCLE TO
GET VECTOR NUMBER
2) PLACE STACK FRAME ON
SYSTEM STACK
1) FETCH INITIAL SYSTEM STACK
POINTER FROM VECTOR
TABLE
1) FETCH PROGRAM COUNTER FROM
VECTOR TABLE
2) PREFETCH INSTRUCTIONS OF APPRO-
PRIATE EXCEPTION HANDLER
3) EXECUTE FIRST INSTRUCTION OF APPRO-
PRIATE EXCEPTION HANDLER
Note that the acknowledge termination ignore state capability is applicable to the LPSTOP
broadcast cycle. If enabled, TA, TEA, and TRA are ignored for a user-programmed number
of BCLK cycles.
7-44
PROCESSOR
INTERRUPT
Figure 7-35. Exiting LPSTOP Mode Flowchart
M68060 USER'S MANUAL
SYSTEM
1) BEGIN TO OSCILLATE CLK FOR AT LEAST
8 CLKS PLUS 2 BCLKS
2) TEMPORARILY CEASE ALL ALTERNATE
MASTER ACTIVITY
3) NEGATE BB, TRA, TEA, TA, CLA, BGR, BG,
SNOOP, AVEC, MDIS, CDIS, TCI, AND TBI.
4) ASSERT RSTI OR ASSERT IPL2–IPL0 TO
GREATER THAN INTERRUPT MASK LEVEL
1) ASSERT BG AFTER PST4–PST0 = $18
2) CONTINUE ALTERNATE MASTER
ACTIVITY AS NECESSARY
1) RESPOND TO INTERRUPT ACKNOWLEDGE
BUS CYCLE AS APPROPRIATE
2) PERFORM NORMAL READ/WRITE TO
MEMORY AS REQUESTED BY PROCESSOR
MOTOROLA