Motorola M68060 User Manual page 273

IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
Table 9-3. Boundary Scan Bit Definitions (Continued)
Bit
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
9-12
Cell Type Pin/Cell Name
I.Pin
I.Pin
O.Pin
O.Pin
O.Pin
IO.Ctl PST4–PST0, XBR ena
O.Pin
O.Pin
O.Pin
IO.Ctl XSAS ena
O.Pin
IO.Ctl XBTT ena
I.Pin
O.Pin
I.Pin XTS ena
I.Pin
O.Pin
IO.Ctl XTIP ena
I.Pin XSNOOP
O.Pin
IO.Ctl XBB ena
I.Pin
O.Pin
IO.Ctl XLOCK, XLOCKE ena
O.Pin
O.Pin XLOCKE
O.Pin
O.Pin
IO.Ctl TLN0,SIZ1–SIZ0,XR_W ena
O.Pin
O.Pin
O.Pin
O.Pin
IO.Ctl TLN1,TM2–TM0 ena
O.Pin
O.Pin
O.Pin
I.Pin
O.Pin
I.Pin
IO.Ctl A1–A0 ena
I.Pin
O.Pin
I.Pin
O.Pin
I.Pin
IO.Ctl A3–A2 ena
O.Pin
I.Pin
M68060 USER'S MANUAL
Pin Type
XTEA
XTA
PST0 Output
PST1 Output
PST2 Output
PST3 Output
PST4 Output
XSAS Output
XBTT
XBTT
XTS
XTS
XTIP Output
XBB
XBB
XBR Output
XLOCK Output
Output
TLN0 Output
SIZ0 Output
SIZ1 Output
XR_W Output
TLN1 Output
TM0 Output
TM1 Output
TM2 Output
A0
A0
A1
A1
XCLA
A2
A2
A3
A3
A4
A4
Input
Input
—
—
I/O
—
I/O
I/O
—
I/O
—
Input
I/O
—
I/O
—
—
—
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
—
I/O
I/O
MOTOROLA