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MC68060 Instructions
CPUSH
Condition Codes:
Not affected.
Instruction Format:
15
14
13
1
1
1
Instruction Fields:
Cache field—Specifies the Cache.
00—No Operation
01—Data Cache
10—Instruction Cache
11—Data and Instruction Caches
Scope field—Specifies the Scope of the Operation.
00—Illegal (causes illegal instruction trap)
01—Line
10—Page
11—All
Register field—Specifies the address register for line and page operations. For line
operations, the low-order bits 3–0 of the address are don't care. Bits 11–0 or 12–0 of
the address are don't care for 4K-byte or 8K-byte page operations, respectively.
D-12
Push and Possibly Invalidate Cache Line
(MC68060, MC68LC060, MC68EC060)
12
11
10
9
1
0
1
0
M68060 USER'S MANUAL
8
7
6
5
0
CACHE
1
CPUSH
4
3
2
1
SCOPE
REGISTER
MOTOROLA
0
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