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Motorola M68MPB16Y1 User Manual

Motorola M68MPB16Y1 User Manual

Mcu personality board
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M68MPB16Y1UM/D
REV 1
March 1998
M68MPB16Y1
MCU PERSONALITY BOARD
USER'S MANUAL
© MOTOROLA, INC., 1993, 1998; All Rights Reserved

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Summary of Contents for Motorola M68MPB16Y1

  • Page 1 M68MPB16Y1UM/D REV 1 March 1998 M68MPB16Y1 MCU PERSONALITY BOARD USER’S MANUAL © MOTOROLA, INC., 1993, 1998; All Rights Reserved...
  • Page 2 Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur.

  • Page 3: Table Of Contents

    CONTENTS CONTENTS CHAPTER 1 GENERAL INFORMATION INTRODUCTION......................1-1 SPECIFICATIONS ......................1-1 EQUIPMENT REQUIRED....................1-1 CUSTOMER SUPPORT ....................1-3 CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION INTRODUCTION......................2-1 HARDWARE PREPARATION ..................2-1 2.2.1 Clock Select Header (W1) ..................2-5 2.2.2 VDDA Select Header (W2) ..................2-6 2.2.3 Voltage Reference High Select Header (W3)............
  • Page 4 SCHEMATIC DIAGRAMS 6.1 INTRODUCTION ......................... 6-1 FIGURE 2-1. M68MPB16Y1 (B version) Parts Location Diagram (top view) ........2-2 2-2. M68MPB16Y1 (C version) Parts Location Diagram (top view) ........2-3 2-3. MPB – MPFB Interconnection (with SDI interface connector)........2-10 2-4. Active Probe Interconnection (with Active Probe Box) ..........2-12 5-1.
  • Page 5 CONTENTS TABLE (continued) 4-12. Logic Analyzer Connector J18 Pin Assignments............4-12 4-13. Logic Analyzer Connector J19 Pin Assignments............4-13 4-14. Logic Analyzer Connector J20 Pin Assignments............4-13 M68MPB16Y1UM/D...
  • Page 6 CONTENTS M68MPB16Y1UM/D...

  • Page 7: Chapter 1 General Information

    GENERAL INFORMATION 1.1 INTRODUCTION This manual provides general information, hardware preparation, installation instructions, a quick start guide, and support information for the M68MPB16Y1 MCU Personality Board (MPB). The MPB is one component of Motorola’s modular approach to MC68HC16Y1 Microcontroller Unit-based product development.

  • Page 8: Specifications

    1.3 EQUIPMENT REQUIRED The external requirements for MPB operation are either an MEVB or MMDS system. For MMDS operation requirements, see the MMDS1632 Motorola Modular Development System User’s Manual, MMDS1632UM/D. For operation requirements for the MEVB, see this manual and the M68MPFB Modular Platform Board User’s Manual, M68MPFBUM/D.

  • Page 9: Customer Support

    GENERAL INFORMATION 1.4 CUSTOMER SUPPORT For information about a Motorola distributor or sales office near you call: AUSTRALIA, Melbourne – (61-3)887-0711 JAPAN, Fukuoka – 81-92-725-7583 Sydney – 61(2)906-3855 Gotanda – 81-3-5487-8311 Nagoya – 81-52-232-3500 BRAZIL, Sao Paulo – 55(11)815-4200 Osaka – 81-6-305-1802 Sendai –...
  • Page 10 GENERAL INFORMATION M68MPB16Y1UM/D...

  • Page 11: Chapter 2 Hardware Preparation And Installation

    There is also an insertion point (E1) for connecting an external ground. There are two versions of the M68MPB16Y1: B and C. On the B version the MCU is installed in a production socket on the board (Figure 2-1 shows the B version board layout).
  • Page 12 01 - RE90335W MPB16Y1B C1 + + C2 Clock Source S / N MC68HC16Y1 External Ground Connection VDDA Source C11 + + C12 VRH Source Reference Mark VRL Source Figure 2-1. M68MPB16Y1 (B version) Parts Location Diagram (top view) M68MPB16Y1UM/D...
  • Page 13 MPB16Y1C 01 - RE90414W + C2 + C1 S / N © 1993 Clock Source M68HC16Y1 Source + C4 + C7 Source Reference Mark External Ground Connection VDDA Source Figure 2-2. M68MPB16Y1 (C version) Parts Location Diagram (top view) M68MPB16Y1UM/D...
  • Page 14 HARDWARE PREPARATION AND INSTALLATION Table 2-1. Jumper Header Types Jumper Header Type Symbol Description two-pin with cut-trace Two-pin jumper header with cut-trace short, designated WX, short where X = the jumper header number. If you cut the short, use a fabricated jumper to return the jumper header to its factory default state.

  • Page 15: Clock Select Header (W1)

    HARDWARE PREPARATION AND INSTALLATION 2.2.1 Clock Select Header (W1) Jumper header W1 connects the MCU external clock (EXTAL) pin to either an on-board or external (target-system) clock source. The drawing below shows the factory configuration: a fabricated jumper on pins 1 and 2. This configuration selects the MPB on-board clock source;...

  • Page 16: Vdda Select Header (W2)

    HARDWARE PREPARATION AND INSTALLATION 2.2.2 VDDA Select Header (W2) Jumper header W2 selects the MPB VDDA power source: either MPB power (VDDI) or an external source. The drawing below shows the factory configuration: a cut-trace short between pins 1 and 2. This configuration connects filtered VDDI to VDDA.

  • Page 17: Voltage Reference High Select Header (W3)

    HARDWARE PREPARATION AND INSTALLATION 2.2.3 Voltage Reference High Select Header (W3) Jumper header W3 selects the voltage reference high (VRH) source: either MPB power (VDDA) or an external VRH source. The drawing below shows the factory configuration: a fabricated jumper on pins 1 and 2. This configuration selects VDDA as the VRH source.

  • Page 18: Voltage Reference Low Select Header (W4)

    HARDWARE PREPARATION AND INSTALLATION 2.2.4 Voltage Reference Low Select Header (W4) Jumper header W4 selects the voltage reference low (VRL) source: either MPB power (VSSA) or an external VRL source. The drawing below shows the factory configuration: a fabricated jumper on pins 1 and 2. This configuration selects VSSA as the VRL source.

  • Page 19: Mevb Configuration

    HARDWARE PREPARATION AND INSTALLATION 2.3 MEVB CONFIGURATION The MEVB contains: • MPB – MCU-device-specific board that defines the MCU to be evaluated. • M68MPFB Modular Platform Board (MPFB) – which provides the interface connections to the host computer, logic analyzer connections, and the platform for installing the MPB.
  • Page 20 HARDWARE PREPARATION AND INSTALLATION Figure 2-3. MPB – MPFB Interconnection (with SDI interface connector) After you have installed the MPB, install the plastic overlay on the MPFB: place the overlay over logic analyzer connectors J12 through J20 and press down. Holes in the overlay slide down over plastic clips on the MPFB.

  • Page 21: Active Probe Configuration

    • Target Control Board (TCB) – the interface between the MPB, target system, and the station module. The TCB is supplied with the MMDS. For more information about the TCB refer to the M68MMDS1632 Motorola Modular Development System User's Manual, MMDS1632UM/D.
  • Page 22 HARDWARE PREPARATION AND INSTALLATION 4. Connect one end of the 01-RE90341W01 REV 0 active probe cable to connector P6 on the MMDS control board; connect the other end to connector J6 on the TCB. Connect one end of the 01-RE90340W01 REV 0 active probe cable to connector P5 on the MMDS control board;...

  • Page 23: Chapter 3 Mevb Quick Start Guide

    3.1 INTRODUCTION This quick start guide is intended for the user who may not be familiar with Motorola’s development tools. This chapter explains the MEVB hardware and software set up for M68MEVB16Y1 operation. Hardware set up consists of configuring the MPB and MPFB jumper headers; software set up consists of installing and running the appropriate macro script file within the debugger.

  • Page 24: Mpfb Jumper Headers

    MEVB QUICK START GUIDE 3.2.2 MPFB Jumper Headers Configure your MPFB jumper headers per the instructions in Table 3-1. Table 3-1 contains information exclusively intended for quick start and ignores the other jumper headers. Table 3-1. MPFB Quick Start Jumper Header Configuration Jumper Header Type...

  • Page 25: Mevb Installation Instructions

    MEVB QUICK START GUIDE Table 3-1. MPFB Quick Start Jumper Header Configuration (continued) Jumper Header Type Description 1 2 3 Jumper header W14 selects the MCU signal for the memory devices in the fast RAM sockets (U9 & U10) and pseudo ROM sockets (U2 & U4). Pins 1 and 2 select the MCU chip select for the memory devices in the fast RAM sockets.

  • Page 26: Power Supply - Mpfb Connection

    MEVB QUICK START GUIDE 3.3.1 Power Supply – MPFB Connection Use MPFB connector J5 to connect a user-supplied power supply to the MEVB. Contact 1 is ground; black lever. Contact 2 is VDD (+5 volts); red lever. Use 20 or 22 AWG wire for power connections. For each wire, trim back the insulation 1/4 in.

  • Page 27: Personal Computer - Bdm Connection

    MEVB QUICK START GUIDE 3.3.2 Personal Computer – BDM Connection Personal computer communication with the MEVB requires background debug mode (BDM) hardware. Connect your BDM hardware between your computer’s I/O port and the BDM header on the MPFB (MPFB connector J6). The drawing below shows signal assignments for connector J6.
  • Page 28 TRAMBAR FFB04 symbol TRAMMCR FFB00 Set SRAM base address dmmb TRAMBAR 01 Enable SRAM array dmmb TRAMMCR 00 Check SRAM: Write Motorola 68HC16 Advanced MCUs dmml 10000 4D6F746F dmml 10004 726F6C61 dmml 10008 20363848 dmml 1000C 43313620 dmml 10010 41647661...

  • Page 29: Chapter 4 Mevb Support Information

    4.2 LOGIC ANALYZER CONNECTOR SIGNALS The tables of this chapter describe MPFB logic analyzer connector signals if you install an M68MPB16Y1 on the MPFB. The signal descriptions on J12 – J20 are the logic analyzer pin-outs on the plastic overlay supplied with the MPB.
  • Page 30 MEVB SUPPORT INFORMATION Table 4-1. Logic Analyzer Connector J7 Pin Assignments Mnemonic Signal 1, 2 SPARE No connection OE(ALL) I/O PRU OUTPUT ENABLE – Input, active high; when low disables all PRU outputs. 4 – 11 PEPAR7 – PEPAR OUTPUTS – Output signals that show the PEPAR0 complement (negated contents) of the PEPAR register.
  • Page 31 MEVB SUPPORT INFORMATION Table 4-3. Logic Analyzer Connector J9 Pin Assignments Mnemonic Signal 1, 2 SPARE No connection OE(H) I/O PRU OUTPUT ENABLE – Input, active high; when low disables the port H outputs. 4 – 11 PH7 – PH0 PORT H I/O SIGNALS –...
  • Page 32 MEVB SUPPORT INFORMATION Table 4-5. Logic Analyzer Connector J11 Pin Assignments Mnemonic Signal +5 VDC POWER – Input voltage (+5Vdc @ 1.0 A) used by the MEVB logic circuits. (To make this pin a no connection, remove the jumper from jumper header W9 on the MPFB.) SPARE No connection...
  • Page 33 MEVB SUPPORT INFORMATION Table 4-6. Logic Analyzer Connector J12 Pin Assignments (continued) Mnemonic Signal LAT-DSI LATCHED INSTRUCTION PIPE 1 – Latched output (Latched IPIPE1) signal of the first state of IPIPE1 for CPU16-based MCUs; indicates instruction pipeline activity. DSO / DEVELOPMENT SERIAL OUT –...
  • Page 34 MEVB SUPPORT INFORMATION Table 4-6. Logic Analyzer Connector J12 Pin Assignments (continued) Mnemonic Signal SIZ0 TRANSFER SIZE – Output signal that indicate the number of bytes still to be transferred during this cycle. READ/WRITE – Output signal that indicates the direction of data transfer on the bus.
  • Page 35 MEVB SUPPORT INFORMATION Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued) Mnemonic Signal DATA STROBE – Active-low output signal. During a read cycle, indicates that an external device should place valid data on the data bus. During a write cycle, indicates that valid data is on the data bus.
  • Page 36 MEVB SUPPORT INFORMATION Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued) Mnemonic Signal A20 / ADDRESS BUS BIT 20 – One bit of the 24-bit address bus. CHIP SELECT 7 – Output signal that selects peripheral or memory devices at programmed addresses.
  • Page 37 MEVB SUPPORT INFORMATION Table 4-8. Logic Analyzer Connector J14 Pin Assignments (continued) Mnemonic Signal 9 – 15 IRQ1 – IRQ7 TARGET INTERRUPT REQUEST 1 - 7 – Active-low input signals from the target that asynchronously provides an interrupt priority level to the CPU. IRQ1 has the lowest priority, IRQ7 has the highest.
  • Page 38 MEVB SUPPORT INFORMATION Table 4-10. Logic Analyzer Connector J16 Pin Assignments Mnemonic Signal 1 – 4 SPARE No connection INPUT CAPTURE 1 – Input signal that latches the contents of the GPT timer counter (TCNT) into the input capture register TIC1 when a selected edge occurs at the pin.
  • Page 39 MEVB SUPPORT INFORMATION Table 4-11. Logic Analyzer Connector J17 Pin Assignments Mnemonic Signal 1 – 4 SPARE No connection VSSA A/D GROUND – A/D ground reference. 6 – 11 AN5 – AN0 ANALOG TO DIGITAL CONVERSION 5 -0 – Analog input lines to the MCU device.
  • Page 40 MEVB SUPPORT INFORMATION Table 4-12. Logic Analyzer Connector J18 Pin Assignments Mnemonic Signal 1 – 4 SPARE No connection SLAVE SELECT – Bi-directional, active-low signal that puts the SPI in slave mode. MOSI MASTER-OUT, SLAVE-IN – Serial output from SPI in master mode;...
  • Page 41 MEVB SUPPORT INFORMATION Table 4-13. Logic Analyzer Connector J19 Pin Assignments Mnemonic Signal 1 – 4 SPARE No connection 5 – 12 TPU4 – TPU11 TIME PROCESSOR UNIT CHANNELS – TPU input/output channels.. 13 – 19 SPARE No connection GROUND Table 4-14.
  • Page 42 MEVB SUPPORT INFORMATION 4-14 M68MPB16Y1UM/D...
  • Page 43 MAPI SUPPORT INFORMATION CHAPTER 5 MAPI SUPPORT INFORMATION 5.1 INTRODUCTION This chapter information pertains to installing the MPB on a target system. The figures in this chapter show the MAPI interface connector layout and pin assignments for MPB connectors P1, P2, P3, and P4 (Figures 5-1 through 5-5). 5.2 MAPI BUS CONNECTORS The connectors required to interface to the MAPI bus are: 2 –...
  • Page 44 MAPI SUPPORT INFORMATION PCS0 / SS MOSI MISO IC4 / OC5 PWMA PWMB PCLK A23 / CS10 / ECLK A22 / CS9 A21 / CS8 A20 / CS7 A19 / CS6 FC2 / CS5 FC1 / CS4 FC0 / CS3 BGACK / CS2 BG / CS1 BR / CS0...
  • Page 45 MAPI SUPPORT INFORMATION PCS0 / SS PCS1 PCS2 PCS3 No Connect No Connect VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA Figure 5-3. MAPI Interface Connector P2 Pin Assignments M68MPB16Y1UM/D...
  • Page 46 MAPI SUPPORT INFORMATION VSSA VSSA MAPI – VRH VSSA MAPI – VRL VSSA VSSA IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 IRQ2 IRQ1 VSTBY DSO / IPIPE0 DSI / IPIPE1 HALT RESET BERR BKPT / DSCLK TSTME / TSC FREEZE / QUOT MAPI –...
  • Page 47 MAPI SUPPORT INFORMATION DSACK0 DSACK1 AVEC PULL-UP (RMC) SIZ0 SIZ1 MODCLK No Connect Figure 5-5. MAPI Interface Connector P4 Pin Assignments M68MPB16Y1UM/D...
  • Page 48 MAPI SUPPORT INFORMATION M68MPB16Y1UM/D...
  • Page 49 SCHEMATIC DIAGRAMS CHAPTER 6 SCHEMATIC DIAGRAMS 6.1 INTRODUCTION This chapter contains the M68MPB16Y1 MCU Personality Board (MPB) schematic diagrams. These schematic diagrams are for reference only and may deviate slightly from the circuits on your MPB. M68MPB16Y1UM/D...
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  • Page 58 SCHEMATIC DIAGRAMS 6-10 M68MPB16Y1UM/D...

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