Input Pin Cell (I.pin); Output Control Cell (Io.ctl) - Motorola M68060 User Manual

SHIFT DR
FROM
INPUT PIN
FROM
LAST
CELL
0 = OTHERWISE
OUTPUT CONTROL
FROM SYSTEM LOGIC
MOTOROLA
IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
G1
1D
1
1
CLOCK DR
Figure 9-5. Input Pin Cell (I.Pin)
1 = EXTEST
SHIFT DR
G1
1
MUX
1
G1
1
1
FROM
LAST
CELL
Figure 9-6. Output Control Cell (IO.Ctl)
M68060 USER'S MANUAL
TO
NEXT
CELL MODE
1D
C1 C1
UPDATE DR
TO NEXT CELL
MUX
1D
C1
CLOCK DR
UPDATE DR
G1
TO
1 SYSTEM
LOGIC
1
TO OUTPUT
BUFFER
(1 = DRIVE)
1D
C1
9-9