I/O Expansion Header - Xilinx ZC702 User Manual

X-Ref Target - Figure 1-17
IIC_RTC_SDA
IIC_RTC_SCL
IIC_RTC_IRQ_1_B
Real time clock connections to the XC7Z020 AP SoC and the PCA9548 8-Channel bus switch
are listed in Table
Table 1-20: Real Time Clock Connections
RTC-8564JE (U16) Pin
6
7
10
Information about the RTC-8564JE is available at the Epson Electronics America website
[Ref 9].

I/O Expansion Header

[Figure 1-2, callout 16]
The 2 x 6 I/O expansion header J54 supports Digilent Pmod Peripheral Modules. 8 pins
(IIC_PMOD[0:7]) are connected to the TI TCA6416APWR I
the Digilent website for information on Digilent Pmod Peripheral Modules
The expansion header circuit is shown in
ZC702 Board User Guide
UG850 (v1.2) April 4, 2013
VADJ
U16
R187
RTC-8564JE
10.0K
Real Time Clock
0.1W
Module
7
SDA
6
SCL
10
INT
Figure 1-17: Real Time Clock Circuit
1-20.
Net Name
IIC_RTC_SCL U44.11 (PCA9548 SC4)
IIC_RTC_SDA U44.10 (PCA9548 SD4)
IIC_RTC_IRQ_1_B U1.U7 (XC7Z020 AP SoC PL BANK 13)
www.xilinx.com
VCC3V3
D5
1
J39
BAT54T1G
YELLOW
30V 400 mW
16
VCC
15
D7
CLKOE
BAT54T1G
14
CLKOUT
30V 400 mW
13
GND
C217
0.01µF
25V
X7R
GND
GND
Connects To
2
C expansion port device U80. See
Figure 1-18.
Feature Descriptions
VCC2V5
D6
BAT54T1G
30V 400 mW
R249
4.7K
2V
B2
NBL-621/N9D
GND
UG850_c1_17_031913
[Ref 10].
38