Xilinx ZC702 User Manual page 24

Hide thumbs Also See for ZC702:
Table of Contents

Advertisement

Figure 1-8
shows the connections of the SD card interface on the ZC702 board.
X-Ref Target - Figure 1-8
22
SDIO_CD_DAT3
22
SDIO_CMD
22 SDIO_CLK
22
SDIO_DAT0
22 SDIO_DAT1
22
SDIO_DAT2
8
SDIO_SDDET
8
SDIO_SDWP
Table 1-9
lists the SD card interface connections to the XC7Z020 AP SoC.
Table 1-9: SDIO Connections to the XC7Z020 AP SoC
XC7Z020 (U1) Pin
Pin Name
Bank
PS_MIO15
500
PS_MIO0
500
PS_MIO41
501
PS_MIO40
501
PS_MIO42
501
PS_MIO45
501
PS_MIO44
501
PS_MIO43
501
ZC702 Board User Guide
UG850 (v1.2) April 4, 2013
VCCMIO_PS
1
1
1
R381
R380
4.7K
4.7K
1/10W
1/10W
2
2
2
5%
5%
Figure 1-8: SD Card Interface
Schematic
Pin
Net Name
Number
E6
SDIO_SDWP
G6
SDIO_SDDET
C8
SDIO_CMD_LS
E14
SDIO_CLK_LS
D8
SDIO_DAT2_LS
B9
SDIO_DAT1_LS
E13
SDIO_DAT0_LS
B11
SDIO_CD_DAT3_LS
www.xilinx.com
VCC3V3
C27
1
R321
0.1µF
4.7K
2
25V
1/10W
X5R
5%
GND
67840-8001
1
CD_DAT3
2
CMD
3
VSS1
4
VDD
5
CLK
6
VSS2
7
DAT0
8
DAT1
9
DAT2
10
DETECT
11
PROTECT
12
DETECT_PROTECT
J64
GND
Level Shifter (U61)
(A) Pin
(B) Pin
Number
Number
N/A
N/A
N/A
N/A
4
20
9
19
1
23
7
16
6
18
3
22
Feature Descriptions
18
IOGND2
17
IOGND1
16
GNDTAB4
15
GNDTAB3
14
GNDTAB2
13
GNDTAB1
GND
UG850_c1_08_030513
SDIO Connector (J64)
Pin
Pin
Number
Name
11
PROTECT
10
DETECT
2
CMD
5
CLK
9
DAT2
8
DAT1
7
DAT0
1
CD_DAT3
24

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents