Xilinx ZC702 User Manual page 8

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2
I
C bus multiplexed to:
Si570 user clock
°
ADV7511 HDMI codec
°
M24C08 EEPROM (1 kB)
°
1-To-16 TCA6416APWR port expander
°
RTC-8564JE real time clock
°
FMC1 LPC connector
°
FMC2 LPC connector
°
PMBUS data/clock
°
Status LEDs:
Ethernet status
°
Power good
°
FPGA INIT
°
FPGA DONE
°
User I/O:
Two programmable logic (PL) user pushbuttons
°
PL user DIP switch (2-pole)
°
Eight PL user LEDs
°
Two processing system (PS) pushbuttons shared with PS 2-pole DIP switch
°
Two PS user LEDs
°
Dual row Pmod GPIO header
°
Single row Pmod GPIO header
°
AP SoC PS Reset Pushbuttons:
SRST_B PS reset button
°
POR_B PS reset button
°
Two VITA 57.1 FMC LPC connectors
Power on/off slide switch
Power management with PMBus voltage and current monitoring via TI power
controllers
Dual 12-bit 1 MSPS XADC analog-to-digital front end
Configuration options:
ZC702 Board User Guide
UG850 (v1.2) April 4, 2013
www.xilinx.com
Overview
8

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