I2C Bus - Xilinx ZC702 User Manual

Table 1-18: ADV7511 to HDMI Receptacle Connections (Cont'd)
ADV7511 (U40)
33
32
54
53
52
51
48
Information about the ADV7511KSTZ-P is available on the Analog Devices website

I2C Bus

[Figure 1-2, callout 14]
The ZC702 board implements a single I
IIC_SDA_SCL), which is routed through an TI Semiconductor PCA9548 1-to-8 channel I
bus switch (U44). The bus switch can operate at speeds up to 400 kHz.
The bus switch I
to select the desired downstream device.
The ZC702 board I
X-Ref Target - Figure 1-16
U1
XC7Z020
AP SoC
PL Bank 13
(2.5V)
U1
XC7Z020
AP SoC
PS Bank 501
(VCCMIO_PS 1.8V)
User applications that communicate with devices on one of the downstream I
first set up a path to the desired bus through the U44 bus switch at I
(0b01110100).
ZC702 Board User Guide
UG850 (v1.2) April 4, 2013
Net Name
HDMI_CLK_P
HDMI_CLK_N
HDMI_DDCSDA
HDMI_DDCSCL
HDMI_HEAC_P
HDMI_HEAC_N
HDMI_CEC
2
C address is 0x74 (0b01110100) and must be addressed and configured
2
C bus topology is shown in
VADJ 2.5V
U56
PCA9517
2
I C
Level Shifter
A
IIC_SCL/SDA_MAIN
VCCMIO_PS 1.8V
U57
PCA9517
2
I C
Level Shifter
PS_SDA/SCL_MAIN A
Figure 1-16: I
Table 1-19 lists the address for each bus.
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HDMI Receptacle P1 Pin
10
12
16
15
14
19
13
2
C port on the XC7Z020 AP SoC (IIC_SDA_MAIN,
Figure 1-16.
3.3 V
U44
PCA9548
1 2 C 1-to-8
Bus Switch
B
IIC_SDA/SCL_MAIN
3.3 V
B
2
C Bus Topology
Feature Descriptions
[Ref 8].
2
C
CH0 - USER_CLK_SDL/SCL
CH1 - IIC_SDA/SCL_HDMI
CH2 - EEPROM_IIC_SDA/SCL
CH3 - PORT_EXPANDER_SDA/SCL
CH4 - IIC_RTC_SDA/SCL
CH5 - FMC1_LPC_IIC_SDA/SCL
CH6 - FMC2_LPC_IIC_SDA/SCL
CH7 - PMBUS_DATA/CLK
UG850_C1_16_030613
2
C buses must
2
C address 0x74
36